arm: mvebu: a38x: serdes: Remove unused PCIe macros and functions

Remove unused PCIe functions from SerDes code. They are unused and are
duplicated either from generic PCIe code or from pci_mvebu.c.

Remove also unused PCIe macros from SerDes code. They are just obfuscated
variants of standards macros in include/pci.h or in pci_mvebu.c.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>

2 files changed, 0 insertions, 188 deletions

diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
index 0445b43..55c3f9c 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
@@ -62,131 +62,3 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
 
 	return MV_OK;
 }
-
-int pex_local_bus_num_set(u32 pex_if, u32 bus_num)
-{
-	u32 pex_status;
-
-	DEBUG_INIT_FULL_S("\n### pex_local_bus_num_set ###\n");
-
-	if (bus_num >= MAX_PEX_BUSSES) {
-		DEBUG_INIT_C("pex_local_bus_num_set: Illegal bus number %d\n",
-			     bus_num, 4);
-		return MV_BAD_PARAM;
-	}
-
-	pex_status = reg_read(PEX_STATUS_REG(pex_if));
-	pex_status &= ~PXSR_PEX_BUS_NUM_MASK;
-	pex_status |=
-	    (bus_num << PXSR_PEX_BUS_NUM_OFFS) & PXSR_PEX_BUS_NUM_MASK;
-	reg_write(PEX_STATUS_REG(pex_if), pex_status);
-
-	return MV_OK;
-}
-
-int pex_local_dev_num_set(u32 pex_if, u32 dev_num)
-{
-	u32 pex_status;
-
-	DEBUG_INIT_FULL_S("\n### pex_local_dev_num_set ###\n");
-
-	pex_status = reg_read(PEX_STATUS_REG(pex_if));
-	pex_status &= ~PXSR_PEX_DEV_NUM_MASK;
-	pex_status |=
-	    (dev_num << PXSR_PEX_DEV_NUM_OFFS) & PXSR_PEX_DEV_NUM_MASK;
-	reg_write(PEX_STATUS_REG(pex_if), pex_status);
-
-	return MV_OK;
-}
-
-/*
- * pex_config_read - Read from configuration space
- *
- * DESCRIPTION:
- *       This function performs a 32 bit read from PEX configuration space.
- *       It supports both type 0 and type 1 of Configuration Transactions
- *       (local and over bridge). In order to read from local bus segment, use
- *       bus number retrieved from pex_local_bus_num_get(). Other bus numbers
- *       will result configuration transaction of type 1 (over bridge).
- *
- * INPUT:
- *       pex_if   - PEX interface number.
- *       bus      - PEX segment bus number.
- *       dev      - PEX device number.
- *       func     - Function number.
- *       reg_offs - Register offset.
- *
- * OUTPUT:
- *       None.
- *
- * RETURN:
- *       32bit register data, 0xffffffff on error
- */
-u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off)
-{
-	u32 pex_data = 0;
-	u32 local_dev, local_bus;
-	u32 pex_status;
-
-	pex_status = reg_read(PEX_STATUS_REG(pex_if));
-	local_dev =
-	    ((pex_status & PXSR_PEX_DEV_NUM_MASK) >> PXSR_PEX_DEV_NUM_OFFS);
-	local_bus =
-	    ((pex_status & PXSR_PEX_BUS_NUM_MASK) >> PXSR_PEX_BUS_NUM_OFFS);
-
-	/*
-	 * In PCI Express we have only one device number
-	 * and this number is the first number we encounter
-	 * else that the local_dev
-	 * spec pex define return on config read/write on any device
-	 */
-	if (bus == local_bus) {
-		if (local_dev == 0) {
-			/*
-			 * if local dev is 0 then the first number we encounter
-			 * after 0 is 1
-			 */
-			if ((dev != 1) && (dev != local_dev))
-				return MV_ERROR;
-		} else {
-			/*
-			 * if local dev is not 0 then the first number we
-			 * encounter is 0
-			 */
-			if ((dev != 0) && (dev != local_dev))
-				return MV_ERROR;
-		}
-	}
-
-	/* Creating PEX address to be passed */
-	pex_data = (bus << PXCAR_BUS_NUM_OFFS);
-	pex_data |= (dev << PXCAR_DEVICE_NUM_OFFS);
-	pex_data |= (func << PXCAR_FUNC_NUM_OFFS);
-	/* Legacy register space */
-	pex_data |= (reg_off & PXCAR_REG_NUM_MASK);
-	/* Extended register space */
-	pex_data |= (((reg_off & PXCAR_REAL_EXT_REG_NUM_MASK) >>
-		      PXCAR_REAL_EXT_REG_NUM_OFFS) << PXCAR_EXT_REG_NUM_OFFS);
-	pex_data |= PXCAR_CONFIG_EN;
-
-	/* Write the address to the PEX configuration address register */
-	reg_write(PEX_CFG_ADDR_REG(pex_if), pex_data);
-
-	/*
-	 * In order to let the PEX controller absorbed the address
-	 * of the read transaction we perform a validity check that
-	 * the address was written
-	 */
-	if (pex_data != reg_read(PEX_CFG_ADDR_REG(pex_if)))
-		return MV_ERROR;
-
-	/* Cleaning Master Abort */
-	reg_bit_set(PEX_CFG_DIRECT_ACCESS(pex_if, PEX_STATUS_AND_COMMAND),
-		    PXSAC_MABORT);
-	/* Read the Data returned in the PEX Data register */
-	pex_data = reg_read(PEX_CFG_DATA_REG(pex_if));
-
-	DEBUG_INIT_FULL_C(" --> ", pex_data, 4);
-
-	return pex_data;
-}
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
index 5d70166..55a4c26 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
@@ -12,28 +12,6 @@
 /* Direct access to PEX0 Root Port's PCIe Capability structure */
 #define PEX0_RP_PCIE_CFG_OFFSET		(0x00080000 + 0x60)
 
-/* Sample at Reset */
-#define MPP_SAMPLE_AT_RESET(id)		(0xe4200 + (id * 4))
-
-/* PCI Express Control and Status Registers */
-#define MAX_PEX_BUSSES			256
-
-#define PEX_IF_REGS_OFFSET(if)		((if) > 0 ?			\
-					 (0x40000 + ((if) - 1) * 0x4000) : \
-					 0x80000)
-#define PEX_IF_REGS_BASE(if)		(PEX_IF_REGS_OFFSET(if))
-#define PEX_CAPABILITIES_REG(if)	((PEX_IF_REGS_BASE(if)) + 0x60)
-#define PEX_LINK_CTRL_STATUS2_REG(if)	((PEX_IF_REGS_BASE(if)) + 0x90)
-#define PEX_CTRL_REG(if)		((PEX_IF_REGS_BASE(if)) + 0x1a00)
-#define PEX_STATUS_REG(if)		((PEX_IF_REGS_BASE(if)) + 0x1a04)
-#define PEX_DBG_STATUS_REG(if)		((PEX_IF_REGS_BASE(if)) + 0x1a64)
-#define PEX_LINK_CAPABILITY_REG		0x6c
-#define PEX_LINK_CTRL_STAT_REG		0x70
-#define PXSR_PEX_DEV_NUM_OFFS		16  /* Device Number Indication */
-#define PXSR_PEX_DEV_NUM_MASK		(0x1f << PXSR_PEX_DEV_NUM_OFFS)
-#define PXSR_PEX_BUS_NUM_OFFS		8 /* Bus Number Indication */
-#define PXSR_PEX_BUS_NUM_MASK		(0xff << PXSR_PEX_BUS_NUM_OFFS)
-
 /* PEX_CAPABILITIES_REG fields */
 #define PCIE0_ENABLE_OFFS		0
 #define PCIE0_ENABLE_MASK		(0x1 << PCIE0_ENABLE_OFFS)
@@ -44,45 +22,7 @@
 #define PCIE3_ENABLE_OFFS		3
 #define PCIE4_ENABLE_MASK		(0x1 << PCIE3_ENABLE_OFFS)
 
-/* Controller revision info */
-#define PEX_DEVICE_AND_VENDOR_ID	0x000
-#define PEX_CFG_DIRECT_ACCESS(if, reg)	(PEX_IF_REGS_BASE(if) + (reg))
-
-/* PCI Express Configuration Address Register */
-#define PXCAR_REG_NUM_OFFS		2
-#define PXCAR_REG_NUM_MAX		0x3f
-#define PXCAR_REG_NUM_MASK		(PXCAR_REG_NUM_MAX << \
-					 PXCAR_REG_NUM_OFFS)
-#define PXCAR_FUNC_NUM_OFFS		8
-#define PXCAR_FUNC_NUM_MAX		0x7
-#define PXCAR_FUNC_NUM_MASK		(PXCAR_FUNC_NUM_MAX << \
-					 PXCAR_FUNC_NUM_OFFS)
-#define PXCAR_DEVICE_NUM_OFFS		11
-#define PXCAR_DEVICE_NUM_MAX		0x1f
-#define PXCAR_DEVICE_NUM_MASK		(PXCAR_DEVICE_NUM_MAX << \
-					 PXCAR_DEVICE_NUM_OFFS)
-#define PXCAR_BUS_NUM_OFFS		16
-#define PXCAR_BUS_NUM_MAX		0xff
-#define PXCAR_BUS_NUM_MASK		(PXCAR_BUS_NUM_MAX << \
-					 PXCAR_BUS_NUM_OFFS)
-#define PXCAR_EXT_REG_NUM_OFFS		24
-#define PXCAR_EXT_REG_NUM_MAX		0xf
-
-#define PEX_CFG_ADDR_REG(if)		((PEX_IF_REGS_BASE(if)) + 0x18f8)
-#define PEX_CFG_DATA_REG(if)		((PEX_IF_REGS_BASE(if)) + 0x18fc)
-
-#define PXCAR_REAL_EXT_REG_NUM_OFFS	8
-#define PXCAR_REAL_EXT_REG_NUM_MASK	(0xf << PXCAR_REAL_EXT_REG_NUM_OFFS)
-
-#define PXCAR_CONFIG_EN			BIT(31)
-#define PEX_STATUS_AND_COMMAND		0x004
-#define PXSAC_MABORT			BIT(29) /* Recieved Master Abort */
-
 int hws_pex_config(const struct serdes_map *serdes_map, u8 count);
-int pex_local_bus_num_set(u32 pex_if, u32 bus_num);
-int pex_local_dev_num_set(u32 pex_if, u32 dev_num);
-u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off);
-
 void board_pex_config(void);
 
 #endif