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author | Michal Simek <michal.simek@xilinx.com> | 2019-06-25 08:55:52 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2019-10-24 13:37:01 +0200 |
commit | bdd368afdaa66c93bf4e867b46da2fe6c78f45eb (patch) | |
tree | 9caec512c84cde6eb53147e6c17795975bb24267 /arch | |
parent | 2703d4b42dae40626ab511876f5a814ca01eae18 (diff) | |
download | u-boot-bdd368afdaa66c93bf4e867b46da2fe6c78f45eb.zip u-boot-bdd368afdaa66c93bf4e867b46da2fe6c78f45eb.tar.gz u-boot-bdd368afdaa66c93bf4e867b46da2fe6c78f45eb.tar.bz2 |
arm64: zynqmp: Sync si570 setup and clock names
Setup proper si570 names and default factory setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 26e127b..864263b 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -387,9 +387,9 @@ compatible = "silabs,si570"; reg = <0x5d>; /* 570JAC000900DG */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ + factory-fout = <33333333>; clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ + clock-output-names = "ref_clk"; }; /* Connection via Samtec J212D */ /* Use for storing information about X-PRC card */ @@ -455,9 +455,9 @@ compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_ddrdimm1_clk"; }; /* 0x50 SPD? */ }; @@ -470,9 +470,9 @@ compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_ddrdimm2_clk"; }; /* 0x50 SPD? */ }; @@ -485,9 +485,9 @@ compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "LPDDR4_SI570_CLK"; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_lpddr4_clk"; }; }; i2c@6 { /* HSDP_SI570 */ @@ -499,9 +499,9 @@ compatible = "silabs,si570"; reg = <0x5d>; /* 570JAC000900DG */ temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "HSDP_SI570"; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_hsdp_clk"; }; }; i2c@7 { /* PCIE_CLK */ |