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| author | Christian Kohn <christian.kohn@xilinx.com> | 2022-10-12 11:30:33 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2022-11-22 15:02:07 +0100 |
| commit | 96dcde487e7ece6de437a55175f9a5ec5c4ecd59 (patch) | |
| tree | 761062fc0584f24ea8c73b69fa02cfe584af56d6 /arch | |
| parent | b34bc22bd9921547246c117fb95eb58bedaceff5 (diff) | |
| download | u-boot-96dcde487e7ece6de437a55175f9a5ec5c4ecd59.zip u-boot-96dcde487e7ece6de437a55175f9a5ec5c4ecd59.tar.gz u-boot-96dcde487e7ece6de437a55175f9a5ec5c4ecd59.tar.bz2 | |
ARM: zynq: DT: Enable all FCLKs by default
The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.
Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynq-7000.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index edc147d..f72ef52 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -340,7 +340,7 @@ u-boot,dm-pre-reloc; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; - fclk-enable = <0>; + fclk-enable = <0xf>; clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", |