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| author | Tom Rini <trini@konsulko.com> | 2021-07-18 18:31:16 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-07-18 18:31:16 -0400 |
| commit | df761ba4254eedf078840ecfade9644839cd5bc0 (patch) | |
| tree | 8cf575593939a3500233bcbf62cbb666e3356333 /arch | |
| parent | 6943da4ee7d1c3c7f28e2121bf45bda966550def (diff) | |
| parent | 526ceb43878bfcaaeffbb988e363e89500695bee (diff) | |
| download | u-boot-df761ba4254eedf078840ecfade9644839cd5bc0.zip u-boot-df761ba4254eedf078840ecfade9644839cd5bc0.tar.gz u-boot-df761ba4254eedf078840ecfade9644839cd5bc0.tar.bz2 | |
Merge tag 'mips-pull-2021-07-18' of https://source.denx.de/u-boot/custodians/u-boot-mipsWIP/18Jul2021
- mips: gardena-smart-gateway: adjust config to new production values
- mips: malta: convert to PCI DM and ETH DM
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/Kconfig | 4 | ||||
| -rw-r--r-- | arch/mips/dts/mti,malta.dts | 28 |
2 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e548016..6b1f10d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -14,8 +14,11 @@ choice config TARGET_MALTA bool "Support malta" + select BOARD_EARLY_INIT_R select DM select DM_SERIAL + select DM_PCI + select DM_ETH select DYNAMIC_IO_PORT_BASE select MIPS_CM select MIPS_INSERT_BOOT_CONFIG @@ -23,6 +26,7 @@ config TARGET_MALTA select MIPS_L2_CACHE select OF_CONTROL select OF_ISA_BUS + select PCI_MAP_SYSTEM_MEMORY select ROM_EXCEPTION_VECTORS select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts index d339229..ef47a34 100644 --- a/arch/mips/dts/mti,malta.dts +++ b/arch/mips/dts/mti,malta.dts @@ -29,4 +29,32 @@ u-boot,dm-pre-reloc; }; }; + + pci0@1bd00000 { + compatible = "mips,pci-msc01"; + device_type = "pci"; + reg = <0x1bd00000 0x2000>; + + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0x0>; + ranges = <0x01000000 0 0x00000000 0x00000000 0 0x800000 /* I/O */ + 0x02000000 0 0x10000000 0xb0000000 0 0x10000000 /* MEM */>; + + status = "disabled"; + }; + + pci0@1be00000 { + compatible = "marvell,pci-gt64120"; + device_type = "pci"; + reg = <0x1be00000 0x2000>; + + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0x0>; + ranges = <0x01000000 0 0x00000000 0x00000000 0 0x20000 /* I/O */ + 0x02000000 0 0x10000000 0x10000000 0 0x8000000 /* MEM */>; + + status = "okay"; + }; }; |