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| author | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2021-07-15 20:53:59 +0200 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2021-07-18 20:37:39 +0200 |
| commit | 73be5636f43e6c0bf3988cc14ceb7a35ecaadc2e (patch) | |
| tree | 7596e88fe7ff9903b869f4724d9ee030b6e0ee59 /arch | |
| parent | 8bee3a38a0684b52a884016f53d6314575fe1344 (diff) | |
| download | u-boot-73be5636f43e6c0bf3988cc14ceb7a35ecaadc2e.zip u-boot-73be5636f43e6c0bf3988cc14ceb7a35ecaadc2e.tar.gz u-boot-73be5636f43e6c0bf3988cc14ceb7a35ecaadc2e.tar.bz2 | |
MIPS: malta: add DT bindings for PCI host controller
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/dts/mti,malta.dts | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts index d339229..ef47a34 100644 --- a/arch/mips/dts/mti,malta.dts +++ b/arch/mips/dts/mti,malta.dts @@ -29,4 +29,32 @@ u-boot,dm-pre-reloc; }; }; + + pci0@1bd00000 { + compatible = "mips,pci-msc01"; + device_type = "pci"; + reg = <0x1bd00000 0x2000>; + + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0x0>; + ranges = <0x01000000 0 0x00000000 0x00000000 0 0x800000 /* I/O */ + 0x02000000 0 0x10000000 0xb0000000 0 0x10000000 /* MEM */>; + + status = "disabled"; + }; + + pci0@1be00000 { + compatible = "marvell,pci-gt64120"; + device_type = "pci"; + reg = <0x1be00000 0x2000>; + + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0x0>; + ranges = <0x01000000 0 0x00000000 0x00000000 0 0x20000 /* I/O */ + 0x02000000 0 0x10000000 0x10000000 0 0x8000000 /* MEM */>; + + status = "okay"; + }; }; |