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| author | Eugen Hristev <eugen.hristev@microchip.com> | 2019-05-24 09:38:10 +0300 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2019-06-06 10:56:42 +0300 |
| commit | 0be07872e3200d9d0f6829e641166f0781327cdf (patch) | |
| tree | dd1d60c2046521f7a1067da5b1fe623e8e763a05 /arch | |
| parent | cd60ea71f380ee4c7af2a56419d6234878b950e4 (diff) | |
| download | u-boot-0be07872e3200d9d0f6829e641166f0781327cdf.zip u-boot-0be07872e3200d9d0f6829e641166f0781327cdf.tar.gz u-boot-0be07872e3200d9d0f6829e641166f0781327cdf.tar.bz2 | |
spl: at91: add support for SPL_AT91_MCK_BYPASS
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.
Also created Kconfig for this specific configuration.
By default this is disabled.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-at91/spl_atmel.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index ef745c9..85290be 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -44,7 +44,15 @@ static void switch_to_main_crystal_osc(void) #endif tmp = readl(&pmc->mor); +/* + * some boards have an external oscillator with driving. + * in this case we need to disable the internal SoC driving (bypass mode) + */ +#if defined(CONFIG_SPL_AT91_MCK_BYPASS) + tmp |= AT91_PMC_MOR_OSCBYPASS; +#else tmp &= ~AT91_PMC_MOR_OSCBYPASS; +#endif tmp &= ~AT91_PMC_MOR_KEY(0xff); tmp |= AT91_PMC_MOR_KEY(0x37); writel(tmp, &pmc->mor); |