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authorTom Rini <trini@konsulko.com>2022-04-05 13:45:22 -0400
committerTom Rini <trini@konsulko.com>2022-04-05 13:45:22 -0400
commit59bffec43a657598b194b9eb30dc01eec06078c7 (patch)
tree80a668bc14a348be6be49a9808e811a7f4bb82c4 /arch
parent037ef53cf01c522073a0a930c84c3ca858f032e1 (diff)
parentda61ee662554f98fac0ab19c6b893edd82edb098 (diff)
downloadu-boot-59bffec43a657598b194b9eb30dc01eec06078c7.zip
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Merge branch '2022-04-04-platform-updates'
- Updates for exynos78x0 and TI K3 platforms
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/k3-am64-ddr.dtsi5
-rw-r--r--arch/arm/dts/k3-am64.dtsi1
-rw-r--r--arch/arm/dts/k3-am642-evm-u-boot.dtsi2
-rw-r--r--arch/arm/dts/k3-am642-r5-evm.dts20
-rw-r--r--arch/arm/dts/k3-am642-r5-sk.dts19
-rw-r--r--arch/arm/dts/k3-am642-sk-u-boot.dtsi2
-rw-r--r--arch/arm/dts/sdm845.dtsi6
-rw-r--r--arch/arm/dts/starqltechn-uboot.dtsi9
-rw-r--r--arch/arm/dts/starqltechn.dts13
-rw-r--r--arch/arm/lib/Makefile5
-rw-r--r--arch/arm/lib/save_prev_bl_data.c91
-rw-r--r--arch/arm/mach-k3/am642_init.c40
12 files changed, 196 insertions, 17 deletions
diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi
index 026a547..8324b38 100644
--- a/arch/arm/dts/k3-am64-ddr.dtsi
+++ b/arch/arm/dts/k3-am64-ddr.dtsi
@@ -7,8 +7,9 @@
memorycontroller: memorycontroller@f300000 {
compatible = "ti,am64-ddrss";
reg = <0x00 0x0f308000 0x00 0x4000>,
- <0x00 0x43014000 0x00 0x100>;
- reg-names = "cfg", "ctrl_mmr_lp4";
+ <0x00 0x43014000 0x00 0x100>,
+ <0x00 0x0f300000 0x00 0x200>;
+ reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg";
power-domains = <&k3_pds 138 TI_SCI_PD_SHARED>,
<&k3_pds 55 TI_SCI_PD_SHARED>;
clocks = <&k3_clks 138 0>, <&k3_clks 16 4>;
diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
index de6805b..7aa94d5 100644
--- a/arch/arm/dts/k3-am64.dtsi
+++ b/arch/arm/dts/k3-am64.dtsi
@@ -64,6 +64,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
+ <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
<0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index 03688a5..0c2d973 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -16,7 +16,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x2400000 0x0 0x80>;
ti,timer-alwon;
- clock-frequency = <250000000>;
+ clock-frequency = <200000000>;
u-boot,dm-spl;
};
};
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index cc48fd4..92a6bfd 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -25,6 +25,7 @@
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ u-boot,dm-spl;
};
a53_0: a53@0 {
@@ -82,6 +83,25 @@
};
};
+&cbass_main {
+ main_esm: esm@420000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x420000 0x0 0x1000>;
+ ti,esm-pins = <160>, <161>;
+ u-boot,dm-spl;
+ };
+};
+
+&cbass_mcu {
+ u-boot,dm-spl;
+ mcu_esm: esm@4100000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x4100000 0x0 0x1000>;
+ ti,esm-pins = <0>, <1>;
+ u-boot,dm-spl;
+ };
+};
+
&main_pmx0 {
u-boot,dm-spl;
main_uart0_pins_default: main-uart0-pins-default {
diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
index 7d1cb85..1f96e3f 100644
--- a/arch/arm/dts/k3-am642-r5-sk.dts
+++ b/arch/arm/dts/k3-am642-r5-sk.dts
@@ -75,6 +75,25 @@
};
};
+&cbass_main {
+ main_esm: esm@420000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x420000 0x0 0x1000>;
+ ti,esm-pins = <160>, <161>;
+ u-boot,dm-spl;
+ };
+};
+
+&cbass_mcu {
+ u-boot,dm-spl;
+ mcu_esm: esm@4100000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x0 0x4100000 0x0 0x1000>;
+ ti,esm-pins = <0>, <1>;
+ u-boot,dm-spl;
+ };
+};
+
&main_pmx0 {
u-boot,dm-spl;
main_uart0_pins_default: main-uart0-pins-default {
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index e5c26b8..afe5bab 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -20,7 +20,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x2400000 0x0 0x80>;
ti,timer-alwon;
- clock-frequency = <250000000>;
+ clock-frequency = <200000000>;
u-boot,dm-spl;
};
};
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 1185b71..6f2fb20 100644
--- a/arch/arm/dts/sdm845.dtsi
+++ b/arch/arm/dts/sdm845.dtsi
@@ -48,10 +48,8 @@
/* DEBUG UART */
qup_uart9: qup-uart9-default {
- pinmux {
- pins = "GPIO_4", "GPIO_5";
- function = "qup9";
- };
+ pins = "GPIO_4", "GPIO_5";
+ function = "gpio";
};
};
diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi
index d8d75e0..b55cccf 100644
--- a/arch/arm/dts/starqltechn-uboot.dtsi
+++ b/arch/arm/dts/starqltechn-uboot.dtsi
@@ -8,15 +8,18 @@
/
{
+ framebuffer@9D400000 {
+ u-boot,dm-pre-reloc;
+ };
soc {
u-boot,dm-pre-reloc;
+ serial@a84000 {
+ u-boot,dm-pre-reloc;
+ };
gcc {
clock-controller@100000 {
u-boot,dm-pre-reloc;
};
- serial@0xa84000 {
- u-boot,dm-pre-reloc;
- };
gpio_north@3900000 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts
index 387420f..0261388 100644
--- a/arch/arm/dts/starqltechn.dts
+++ b/arch/arm/dts/starqltechn.dts
@@ -34,9 +34,18 @@
method = "smc";
};
+ framebuffer: framebuffer@9D400000 {
+ compatible = "simple-framebuffer";
+ reg = <0 0x9D400000 0 (2960 * 1440 * 4)>;//2400000
+ width = <1440>;
+ height = <2960>;
+ stride = <(1440 * 4)>;
+ format = "a8r8g8b8";
+ };
+
soc: soc {
- serial@0xa84000 {
- status = "ok";
+ serial@a84000 {
+ status = "okay";
};
pinctrl@3900000 {
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 594fc12..c603fe6 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -48,6 +48,11 @@ obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
endif
obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o
+ifneq ($(filter y,$(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) $(CONFIG_SAVE_PREV_BL_FDT_ADDR)),)
+obj-y += save_prev_bl_data.o
+endif
+
+# obj-$(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) += save_prev_bl_data.o
obj-y += bdinfo.o
obj-y += sections.o
CFLAGS_REMOVE_sections.o := $(LTO_CFLAGS)
diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c
new file mode 100644
index 0000000..f4ee86a
--- /dev/null
+++ b/arch/arm/lib/save_prev_bl_data.c
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * save_prev_bl_data - saving previous bootloader data
+ * to environment variables.
+ *
+ * Copyright (c) 2022 Dzmitry Sankouski (dsankouski@gmail.com)
+ */
+#include <init.h>
+#include <env.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <fdt.h>
+#include <common.h>
+#include <linux/errno.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+
+static ulong reg0 __section(".data");
+
+/**
+ * Save x0 register value, assuming previous bootloader set it to
+ * point on loaded fdt or (for older linux kernels)atags.
+ */
+void save_boot_params(ulong r0)
+{
+ reg0 = r0;
+ save_boot_params_ret();
+}
+
+bool is_addr_accessible(phys_addr_t addr)
+{
+ struct mm_region *mem = mem_map;
+ phys_addr_t bank_start;
+ phys_addr_t bank_end;
+
+ while (mem->size) {
+ bank_start = mem->phys;
+ bank_end = bank_start + mem->size;
+ debug("check if block %pap - %pap includes %pap\n", &bank_start, &bank_end, &addr);
+ if (addr > bank_start && addr < bank_end)
+ return true;
+ mem++;
+ }
+
+ return false;
+}
+
+int save_prev_bl_data(void)
+{
+ struct fdt_header *fdt_blob;
+ int node;
+ u64 initrd_start_prop;
+
+ if (!is_addr_accessible((phys_addr_t)reg0))
+ return -ENODATA;
+
+ fdt_blob = (struct fdt_header *)reg0;
+ if (!fdt_valid(&fdt_blob)) {
+ pr_warn("%s: address 0x%lx is not a valid fdt\n", __func__, reg0);
+ return -ENODATA;
+ }
+
+ if (CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR))
+ env_set_addr("prevbl_fdt_addr", (void *)reg0);
+ if (!CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR))
+ return 0;
+
+ node = fdt_path_offset(fdt_blob, "/chosen");
+ if (!node) {
+ pr_warn("%s: chosen node not found in device tree at addr: 0x%lx\n",
+ __func__, reg0);
+ return -ENODATA;
+ }
+ /*
+ * linux,initrd-start property might be either 64 or 32 bit,
+ * depending on primary bootloader implementation.
+ */
+ initrd_start_prop = fdtdec_get_uint64(fdt_blob, node, "linux,initrd-start", 0);
+ if (!initrd_start_prop) {
+ debug("%s: attempt to get uint64 linux,initrd-start property failed, trying uint\n",
+ __func__);
+ initrd_start_prop = fdtdec_get_uint(fdt_blob, node, "linux,initrd-start", 0);
+ if (!initrd_start_prop) {
+ debug("%s: attempt to get uint failed, too\n", __func__);
+ return -ENODATA;
+ }
+ }
+ env_set_addr("prevbl_initrd_start_addr", (void *)initrd_start_prop);
+
+ return 0;
+}
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index eabfd57..add7ea8 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -24,12 +24,22 @@
#include <dm/root.h>
#if defined(CONFIG_SPL_BUILD)
+#define MCU_CTRL_MMR0_BASE 0x04500000
+#define CTRLMMR_MCU_RST_CTRL 0x04518170
static void ctrl_mmr_unlock(void)
{
/* Unlock all PADCFG_MMR1 module registers */
mmr_unlock(PADCFG_MMR1_BASE, 1);
+ /* Unlock all MCU_CTRL_MMR0 module registers */
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
+
/* Unlock all CTRL_MMR0 module registers */
mmr_unlock(CTRL_MMR0_BASE, 0);
mmr_unlock(CTRL_MMR0_BASE, 1);
@@ -37,9 +47,6 @@ static void ctrl_mmr_unlock(void)
mmr_unlock(CTRL_MMR0_BASE, 3);
mmr_unlock(CTRL_MMR0_BASE, 5);
mmr_unlock(CTRL_MMR0_BASE, 6);
-
- /* Unlock all MCU_PADCFG_MMR1 module registers */
- mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
}
/*
@@ -142,9 +149,20 @@ int fdtdec_board_setup(const void *fdt_blob)
}
#endif
+#if defined(CONFIG_ESM_K3)
+static void enable_mcu_esm_reset(void)
+{
+ /* Set CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RST_EN_Z to '0' (low active) */
+ u32 stat = readl(CTRLMMR_MCU_RST_CTRL);
+
+ stat &= 0xFFFDFFFF;
+ writel(stat, CTRLMMR_MCU_RST_CTRL);
+}
+#endif
+
void board_init_f(ulong dummy)
{
-#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS)
+#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS) || defined(CONFIG_ESM_K3)
struct udevice *dev;
int ret;
#endif
@@ -194,6 +212,20 @@ void board_init_f(ulong dummy)
/* Output System Firmware version info */
k3_sysfw_print_ver();
+#if defined(CONFIG_ESM_K3)
+ /* Probe/configure ESM0 */
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000", &dev);
+ if (ret)
+ printf("esm main init failed: %d\n", ret);
+
+ /* Probe/configure MCUESM */
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4100000", &dev);
+ if (ret)
+ printf("esm mcu init failed: %d\n", ret);
+
+ enable_mcu_esm_reset();
+#endif
+
#if defined(CONFIG_K3_AM64_DDRSS)
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)