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| author | Tom Rini <trini@konsulko.com> | 2022-06-25 11:02:45 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-07-07 14:01:09 -0400 |
| commit | f6c1f91761aef72961466c7f15e25148c7f17040 (patch) | |
| tree | 8bc0b9ad57d028acb8895b219372e4430129d404 /arch | |
| parent | 5a4461867cee452f7e2e23d2afc29f34f659f67b (diff) | |
| download | u-boot-f6c1f91761aef72961466c7f15e25148c7f17040.zip u-boot-f6c1f91761aef72961466c7f15e25148c7f17040.tar.gz u-boot-f6c1f91761aef72961466c7f15e25148c7f17040.tar.bz2 | |
Convert CONFIG_SYS_FSL_CPC et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_CPC
CONFIG_SYS_CPC_REINIT_F
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Kconfig.nxp | 1 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 9 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_secure_boot.h | 3 |
3 files changed, 10 insertions, 3 deletions
diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 5971ec5..d3ebbff 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -16,6 +16,7 @@ config CHAIN_OF_TRUST select SHA_HW_ACCEL select SHA_PROG_HW_ACCEL select ENV_IS_NOWHERE + select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT select CMD_EXT4 if ARM select CMD_EXT4_WRITE if ARM imply CMD_BLOB diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 9c5b1af..915e28e 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1221,6 +1221,15 @@ config SYS_BOOK3E_HV bool "Category E.HV is supported" depends on BOOKE +config SYS_CPC_REINIT_F + bool + help + The CPC is configured as SRAM at the time of U-Boot entry and is + required to be re-initialized. + +config SYS_FSL_CPC + bool "Corenet Platform Cache support" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index a96a1ac..3e70760 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -21,9 +21,6 @@ defined(CONFIG_TARGET_T1042D4RDB) || \ defined(CONFIG_TARGET_T1042RDB_PI) || \ defined(CONFIG_ARCH_T1024) -#ifndef CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_CPC_REINIT_F -#endif #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 #endif |