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| author | Luka Kovacic <luka.kovacic@sartura.hr> | 2020-07-23 10:56:36 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2020-08-06 14:12:14 +0200 |
| commit | a263df59be47e6e6383ffc17f75b127e0b5034c7 (patch) | |
| tree | 4a464d6ca1f6d2aee61682a7f5f2ba4124052540 /arch | |
| parent | 7a7f3219a7fb0be5e63df78ee360d9e5466cd908 (diff) | |
| download | u-boot-a263df59be47e6e6383ffc17f75b127e0b5034c7.zip u-boot-a263df59be47e6e6383ffc17f75b127e0b5034c7.tar.gz u-boot-a263df59be47e6e6383ffc17f75b127e0b5034c7.tar.bz2 | |
arm: mvebu: Add CRS305-1G-4S Bit board
MikroTik CRS305-1G-4S Bit board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
The Bit board variant is added, which has a bigger Macronix flash.
Add basic U-Boot, UART and Winbond SPI flash support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts | 43 |
2 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 43a2ee1..5195480 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -219,6 +219,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-8040-db.dtb \ armada-8040-mcbin.dtb \ armada-xp-crs305-1g-4s.dtb \ + armada-xp-crs305-1g-4s-bit.dtb \ armada-xp-db-xc3-24g4xg.dtb \ armada-xp-gp.dtb \ armada-xp-maxbcm.dtb \ diff --git a/arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts b/arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts new file mode 100644 index 0000000..059bf48 --- /dev/null +++ b/arch/arm/dts/armada-xp-crs305-1g-4s-bit.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for MikroTik CRS305-1G-4S+ Bit board + * + * Copyright (C) 2020 Sartura Ltd. + * Author: Luka Kovacic <luka.kovacic@sartura.hr> + */ + +#include "armada-xp-crs305-1g-4s.dtsi" + +/ { + model = "MikroTik CRS305-1G-4S+ Bit"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + m25p,fast-read; + + partition@u-boot { + reg = <0x00000000 0x001f0000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x001f0000 0x00010000>; + label = "u-boot-env"; + }; + partition@ubi1 { + reg = <0x00200000 0x03f00000>; + label = "ubi1"; + }; + partition@ubi2 { + reg = <0x04100000 0x03f00000>; + label = "ubi2"; + }; + }; +}; |