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| author | Tom Rini <trini@konsulko.com> | 2022-05-24 14:14:02 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-06-06 12:09:12 -0400 |
| commit | 4c97c8cd425ff71004cdd9892ca37d46897a7084 (patch) | |
| tree | 44605d9c2fe2ae885d47e59ee510a60bcf792eb7 /arch | |
| parent | 931bad1c72b5cdc030f4b972420f62de306e11d2 (diff) | |
| download | u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.zip u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.tar.gz u-boot-4c97c8cd425ff71004cdd9892ca37d46897a7084.tar.bz2 | |
powerpc: Switch to using CONFIG_SYS_INIT_SP_OFFSET from CONFIG_SYS_GBL_DATA_OFFSET
In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it
does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And
it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other
architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures
define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for
consistency with other architectures.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/spl_minimal.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/start.S | 4 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 4 |
5 files changed, 7 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index e6dcb8a..b2b259b 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -138,7 +138,7 @@ void cpu_init_f (volatile immap_t * im) 0; /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 11b1e61..6d4655f 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; void cpu_init_f (volatile immap_t * im) { /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* global data region was cleared in start.S */ diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 7a01b16..b136456 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -229,8 +229,8 @@ in_flash: /* set up the stack pointer in our newly created * cache-ram; use r3 to keep the new SP for now to * avoid overiding the SP it uselessly */ - lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h - ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l + lis r3, CONFIG_SYS_INIT_SP_ADDR@h + ori r3, r3, CONFIG_SYS_INIT_SP_ADDR@l /* r4 = end of GD area */ addi r4, r3, GENERATED_GBL_DATA_SIZE diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 584454e..612941f 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -94,7 +94,7 @@ void cpu_init_early_f(void *fdt) #endif /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR; /* gd area was zeroed during startup */ diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 48f06f5..649afa0 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1160,8 +1160,8 @@ _start_cont: bne 1b #if CONFIG_VAL(SYS_MALLOC_F_LEN) - lis r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h - ori r4,r4,(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l + lis r4,CONFIG_SYS_INIT_SP_ADDR@h + ori r4,r4,CONFIG_SYS_INIT_SP_ADDR@l addi r3,r3,16 /* Pre-relocation malloc area */ stw r3,GD_MALLOC_BASE(r4) |