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| author | Tom McLeod <tom.mcleod@opalkelly.com> | 2017-09-27 17:53:26 -0700 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 15:53:07 +0100 |
| commit | 413ab5b0e1b88057e472ea63eb05b00eee9cf6b1 (patch) | |
| tree | 9f522e34581bb6434ce349adaa3b99d4e99cd1fd /arch | |
| parent | 549d684d4ef2d4fcfe4f5b9b3eb3954270e7e4a4 (diff) | |
| download | u-boot-413ab5b0e1b88057e472ea63eb05b00eee9cf6b1.zip u-boot-413ab5b0e1b88057e472ea63eb05b00eee9cf6b1.tar.gz u-boot-413ab5b0e1b88057e472ea63eb05b00eee9cf6b1.tar.bz2 | |
arm: zynq: Add support for SYZYGY Hub board
Add the Zynq-based SYZYGY Hub board from Opal Kelly. The board
contains a Xilinx Zynq xc7z012s SoC, 1GB DDR3 RAM, and supports
booting from SD.
Signed-off-by: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Michal Simek <monstr@monstr.eu>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-syzygy-hub.dts | 72 |
2 files changed, 74 insertions, 1 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cd540e9..ecbc964 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -137,7 +137,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-zc770-xm010.dtb \ zynq-zc770-xm011.dtb \ zynq-zc770-xm012.dtb \ - zynq-zc770-xm013.dtb + zynq-zc770-xm013.dtb \ + zynq-syzygy-hub.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-ep108.dtb \ zynqmp-zcu102-revA.dtb \ diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts new file mode 100644 index 0000000..ebd08b4 --- /dev/null +++ b/arch/arm/dts/zynq-syzygy-hub.dts @@ -0,0 +1,72 @@ +/* + * SYZYGY Hub DTS + * + * Copyright (C) 2011 - 2015 Xilinx + * Copyright (C) 2017 Opal Kelly Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "SYZYGY Hub"; + compatible = "opalkelly,syzygy-hub", "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart0; + mmc0 = &sdhci0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + usb_phy0: phy0 { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + reset-gpios = <&gpio0 47 1>; + }; +}; + +&clkc { + ps-clk-frequency = <50000000>; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@0 { + reg = <0>; + device_type = "ethernet-phy"; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "otg"; + usb-phy = <&usb_phy0>; +}; |