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| author | Tom Rini <trini@konsulko.com> | 2022-06-16 14:04:37 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-07-05 17:03:02 -0400 |
| commit | 2b2817b5c879f784b37aa79eb66c5cee5db2685c (patch) | |
| tree | 277cca54e4fc48ce4a82e693116ae11784af9ab9 /arch | |
| parent | d622b0892309a7835ee1ae50f2f07f0a14253ed1 (diff) | |
| download | u-boot-2b2817b5c879f784b37aa79eb66c5cee5db2685c.zip u-boot-2b2817b5c879f784b37aa79eb66c5cee5db2685c.tar.gz u-boot-2b2817b5c879f784b37aa79eb66c5cee5db2685c.tar.bz2 | |
Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
CONFIG_ESBC_HDR_LS
CONFIG_ESBC_ADDR_64BIT
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Kconfig.nxp | 9 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/config.h | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/fsl_secure_boot.h | 8 |
4 files changed, 14 insertions, 20 deletions
diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 85acdde..4d04c03 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -24,6 +24,15 @@ config CMD_ESBC_VALIDATE esbc_validate - validate signature using RSA verification esbc_halt - put the core in spin loop (Secure Boot Only) +config ESBC_HDR_LS + bool + +config ESBC_ADDR_64BIT + def_bool y + depends on ESBC_HDR_LS && FSL_LAYERSCAPE + help + For Layerscape based platforms, ESBC image Address in Header is 64bit. + config DEEP_SLEEP bool "Enable SoC deep sleep feature" depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3ea023d..7f08733 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -26,6 +26,7 @@ config ARCH_LS1012A config ARCH_LS1028A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_LAYERSCAPE select FSL_LSCH3 select GICV3 @@ -138,6 +139,7 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT + select ESBC_HDR_LS select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -187,6 +189,7 @@ config ARCH_LS2080A select ARM_ERRATA_828024 select ARM_ERRATA_829520 select ARM_ERRATA_833471 + select ESBC_HDR_LS select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 @@ -239,6 +242,7 @@ config ARCH_LS2080A config ARCH_LX2162A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE @@ -277,6 +281,7 @@ config ARCH_LX2162A config ARCH_LX2160A bool select ARMV8_SET_SMPEN + select ESBC_HDR_LS select FSL_DDR_BIST select FSL_DDR_INTERACTIVE select FSL_LAYERSCAPE diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 1315beb..709c293 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -63,9 +63,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -168,9 +165,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 @@ -223,9 +217,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE @@ -285,9 +276,6 @@ /* Security Monitor */ #define CONFIG_SYS_FSL_SEC_MON_LE -/* Secure Boot */ -#define CONFIG_ESBC_HDR_LS - /* DCFG - GUR */ #define CONFIG_SYS_FSL_CCSR_GUR_LE diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index b0c7599..154663e 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -25,14 +25,6 @@ #define CONFIG_KEY_REVOCATION -#if defined(CONFIG_FSL_LAYERSCAPE) -/* - * For fsl layerscape based platforms, ESBC image Address in Header - * is 64 bit. - */ -#define CONFIG_ESBC_ADDR_64BIT -#endif - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images |