aboutsummaryrefslogtreecommitdiff
path: root/arch/x86
diff options
context:
space:
mode:
authorBin Meng <bmeng.cn@gmail.com>2018-06-03 19:04:17 -0700
committerBin Meng <bmeng.cn@gmail.com>2018-06-13 09:50:57 +0800
commitfb05f0b02b01aed48db48f02a15e52c6de2d0dac (patch)
treed2c81587706d01d4ec701c6d34faf7c7e068ca8e /arch/x86
parent80abc8165e658f4538ef2ab00ceba118e097dbfd (diff)
downloadu-boot-fb05f0b02b01aed48db48f02a15e52c6de2d0dac.zip
u-boot-fb05f0b02b01aed48db48f02a15e52c6de2d0dac.tar.gz
u-boot-fb05f0b02b01aed48db48f02a15e52c6de2d0dac.tar.bz2
x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively. SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores the actual BIOS image which is U-Boot. Building a single image with both ME firmware and U-Boot does not make sense. This also describes the exact flash location where the u-boot.rom should be programmed in the documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
0 files changed, 0 insertions, 0 deletions