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| author | Simon Glass <sjg@chromium.org> | 2020-04-26 09:12:53 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-04-30 17:40:16 +0800 |
| commit | c793dbdb902baafeef869e3b3b16049af9c11979 (patch) | |
| tree | 75e21f19c34864dcac52788f309b2747eb6c553f /arch/x86/lib/fsp2/fsp_init.c | |
| parent | 0b885bcfd9b06943bf3dc3102f95961826b04f18 (diff) | |
| download | u-boot-c793dbdb902baafeef869e3b3b16049af9c11979.zip u-boot-c793dbdb902baafeef869e3b3b16049af9c11979.tar.gz u-boot-c793dbdb902baafeef869e3b3b16049af9c11979.tar.bz2 | |
x86: fsp: Allow skipping init code when chain loading
It is useful to be able to boot the same x86 image on a device with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.
When U-Boot is not the first-stage bootloader much of this code is not
needed and can break booting. Add checks for this to the FSP code.
Rather than checking for the amount of available SDRAM, just use 1GB in
this situation, which should be safe. Using 2GB may run into a memory
hole on some SoCs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/lib/fsp2/fsp_init.c')
| -rw-r--r-- | arch/x86/lib/fsp2/fsp_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index da9bd6b..c7dc2ea 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -23,7 +23,7 @@ int arch_cpu_init_dm(void) int ret; /* Make sure pads are set up early in U-Boot */ - if (spl_phase() != PHASE_BOARD_F) + if (!ll_boot_init() || spl_phase() != PHASE_BOARD_F) return 0; /* Probe all pinctrl devices to set up the pads */ |