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| author | Samuel Holland <samuel@sholland.org> | 2023-10-31 00:32:12 -0500 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-11-02 15:15:33 +0800 |
| commit | a6a77e47343d0b511136b76da0c853304a3f1423 (patch) | |
| tree | e067121f87a3ab9ab3dce00b4d53d353be0f3e51 /arch/riscv | |
| parent | 891a181cda56ce6f7ee05dec5051ea2bbe5a6c4c (diff) | |
| download | u-boot-a6a77e47343d0b511136b76da0c853304a3f1423.zip u-boot-a6a77e47343d0b511136b76da0c853304a3f1423.tar.gz u-boot-a6a77e47343d0b511136b76da0c853304a3f1423.tar.bz2 | |
riscv: Sort target configs alphabetically
Clean things up for the next time somebody adds a target.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/Kconfig | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 8fc81fb..6d0d812 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -14,6 +14,9 @@ config TARGET_ANDES_AE350 config TARGET_MICROCHIP_ICICLE bool "Support Microchip PolarFire-SoC Icicle Board" +config TARGET_OPENPITON_RISCV64 + bool "Support RISC-V cores on OpenPiton SoC" + config TARGET_QEMU_VIRT bool "Support QEMU Virt Board" @@ -24,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED bool "Support SiFive Unmatched Board" select SYS_CACHE_SHIFT_6 +config TARGET_SIPEED_MAIX + bool "Support Sipeed Maix Board" + select SYS_CACHE_SHIFT_6 + config TARGET_STARFIVE_VISIONFIVE2 bool "Support StarFive VisionFive2 Board" select BOARD_LATE_INIT @@ -32,13 +39,6 @@ config TARGET_TH1520_LPI4A bool "Support Sipeed's TH1520 Lichee PI 4A Board" select SYS_CACHE_SHIFT_6 -config TARGET_SIPEED_MAIX - bool "Support Sipeed Maix Board" - select SYS_CACHE_SHIFT_6 - -config TARGET_OPENPITON_RISCV64 - bool "Support RISC-V cores on OpenPiton SoC" - endchoice config SYS_ICACHE_OFF @@ -76,12 +76,12 @@ config SPL_ZERO_MEM_BEFORE_USE source "board/AndesTech/ae350/Kconfig" source "board/emulation/qemu-riscv/Kconfig" source "board/microchip/mpfs_icicle/Kconfig" +source "board/openpiton/riscv64/Kconfig" source "board/sifive/unleashed/Kconfig" source "board/sifive/unmatched/Kconfig" -source "board/thead/th1520_lpi4a/Kconfig" -source "board/openpiton/riscv64/Kconfig" source "board/sipeed/maix/Kconfig" source "board/starfive/visionfive2/Kconfig" +source "board/thead/th1520_lpi4a/Kconfig" # platform-specific options below source "arch/riscv/cpu/andesv5/Kconfig" |