diff options
| author | Bin Meng <bmeng@tinylab.org> | 2023-06-21 23:11:46 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-07-12 13:21:40 +0800 |
| commit | 9675d9202780fd996c00ad34f0360c89376205b3 (patch) | |
| tree | 45a6e78f33e00d2a1bbe996d5895162c7f9dbf05 /arch/riscv/lib | |
| parent | 7f1a30fdeb6b51ddeb8ca8ecbfcc8069721db186 (diff) | |
| download | u-boot-9675d9202780fd996c00ad34f0360c89376205b3.zip u-boot-9675d9202780fd996c00ad34f0360c89376205b3.tar.gz u-boot-9675d9202780fd996c00ad34f0360c89376205b3.tar.bz2 | |
riscv: Rename SiFive CLINT to RISC-V ALINT
As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/riscv/lib')
| -rw-r--r-- | arch/riscv/lib/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/lib/aclint_ipi.c (renamed from arch/riscv/lib/sifive_clint.c) | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index e5a81ba..02c4d8f 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-$(CONFIG_SIFIVE_CACHE) += sifive_cache.o ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) -obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint.o +obj-$(CONFIG_$(SPL_)RISCV_ACLINT) += aclint_ipi.o obj-$(CONFIG_ANDES_PLICSW) += andes_plicsw.o else obj-$(CONFIG_SBI) += sbi.o diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/aclint_ipi.c index f242168..90b8e12 100644 --- a/arch/riscv/lib/sifive_clint.c +++ b/arch/riscv/lib/aclint_ipi.c @@ -29,16 +29,16 @@ int riscv_init_ipi(void) struct udevice *dev; ret = uclass_get_device_by_driver(UCLASS_TIMER, - DM_DRIVER_GET(sifive_clint), &dev); + DM_DRIVER_GET(riscv_aclint_timer), &dev); if (ret) return ret; if (dev_get_driver_data(dev) != 0) - gd->arch.clint = dev_read_addr_ptr(dev); + gd->arch.aclint = dev_read_addr_ptr(dev); else - gd->arch.clint = syscon_get_first_range(RISCV_SYSCON_CLINT); + gd->arch.aclint = syscon_get_first_range(RISCV_SYSCON_ACLINT); - if (!gd->arch.clint) + if (!gd->arch.aclint) return -EINVAL; return 0; @@ -46,27 +46,27 @@ int riscv_init_ipi(void) int riscv_send_ipi(int hart) { - writel(1, (void __iomem *)MSIP_REG(gd->arch.clint, hart)); + writel(1, (void __iomem *)MSIP_REG(gd->arch.aclint, hart)); return 0; } int riscv_clear_ipi(int hart) { - writel(0, (void __iomem *)MSIP_REG(gd->arch.clint, hart)); + writel(0, (void __iomem *)MSIP_REG(gd->arch.aclint, hart)); return 0; } int riscv_get_ipi(int hart, int *pending) { - *pending = readl((void __iomem *)MSIP_REG(gd->arch.clint, hart)); + *pending = readl((void __iomem *)MSIP_REG(gd->arch.aclint, hart)); return 0; } static const struct udevice_id riscv_aclint_swi_ids[] = { - { .compatible = "riscv,aclint-mswi", .data = RISCV_SYSCON_CLINT }, + { .compatible = "riscv,aclint-mswi", .data = RISCV_SYSCON_ACLINT }, { } }; |