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| author | Bin Meng <bmeng.cn@gmail.com> | 2021-05-11 20:04:12 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2021-05-17 16:42:24 +0800 |
| commit | a6d7e8c9149f5f1b94f68129fbe5dec9e1e1489d (patch) | |
| tree | 282c6060fdc4bb24f483900897d51116fa5b0e0e /arch/riscv/lib | |
| parent | 2b039940f308cb6a3e6d45d0e8136f7bd35a0356 (diff) | |
| download | u-boot-a6d7e8c9149f5f1b94f68129fbe5dec9e1e1489d.zip u-boot-a6d7e8c9149f5f1b94f68129fbe5dec9e1e1489d.tar.gz u-boot-a6d7e8c9149f5f1b94f68129fbe5dec9e1e1489d.tar.bz2 | |
riscv: Split SiFive CLINT support between SPL and U-Boot proper
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to
control the enabling of SiFive CLINT support in both SPL (M-mode)
and U-Boot proper (S-mode). So for a typical SPL config that the
SiFive CLINT driver is enabled in both SPL and U-Boot proper, that
means the S-mode U-Boot tries to access the memory-mapped CLINT
registers directly, instead of the normal 'rdtime' instruction.
This was not a problem before, as the hardware does not forbid the
access from S-mode. However this becomes an issue now with OpenSBI
commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain")
that the SiFive CLINT register space is protected by PMP for M-mode
access only. U-Boot proper does not boot any more with the latest
OpenSBI, that access exceptions are fired forever from U-Boot when
trying to read the timer value via the SiFive CLINT driver in U-Boot.
To solve this, we need to split current SiFive CLINT support between
SPL and U-Boot proper, using 2 separate Kconfig options.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Diffstat (limited to 'arch/riscv/lib')
| -rw-r--r-- | arch/riscv/lib/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index d08cbe9..c4cc414 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -11,7 +11,7 @@ obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) -obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o +obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint.o obj-$(CONFIG_ANDES_PLIC) += andes_plic.o else obj-$(CONFIG_SBI) += sbi.o |