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| author | Lukas Auer <lukas.auer@aisec.fraunhofer.de> | 2019-08-21 21:14:45 +0200 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-08-26 16:07:42 +0800 |
| commit | 8c59f2023cc8d4ab32b3988193ff2eb116df5995 (patch) | |
| tree | f00b5a0faf61438352a4a8caab2d62a8f9539f2c /arch/riscv/cpu/generic/Kconfig | |
| parent | 5e30e45c83264841018dc8135034426fd0c0f857 (diff) | |
| download | u-boot-8c59f2023cc8d4ab32b3988193ff2eb116df5995.zip u-boot-8c59f2023cc8d4ab32b3988193ff2eb116df5995.tar.gz u-boot-8c59f2023cc8d4ab32b3988193ff2eb116df5995.tar.bz2 | |
riscv: add SPL support
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot
device.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'arch/riscv/cpu/generic/Kconfig')
| -rw-r--r-- | arch/riscv/cpu/generic/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index b7552f5..b2cb155 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -10,3 +10,6 @@ config GENERIC_RISCV imply RISCV_TIMER imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU + imply SPL_CPU_SUPPORT + imply SPL_OPENSBI + imply SPL_LOAD_FIT |