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| author | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2017-02-02 15:02:00 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-02-03 14:31:45 -0800 |
| commit | add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504 (patch) | |
| tree | 42764dc1d5255e15910c9df403ed2969379cdb96 /arch/powerpc/cpu/mpc85xx/speed.c | |
| parent | 068789773d0b369a6a64120776932f912d183f61 (diff) | |
| download | u-boot-add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504.zip u-boot-add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504.tar.gz u-boot-add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504.tar.bz2 | |
arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.
Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/speed.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 28 |
1 files changed, 2 insertions, 26 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index adba092..cb8281e 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -607,32 +607,8 @@ void get_sys_info(sys_info_t *sys_info) #endif /* CONFIG_FSL_CORENET */ #if defined(CONFIG_FSL_LBC) - uint lcrr_div; -#if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -#else - lcrr_div = in_be32(&(LBC_BASE_ADDR)->lcrr) & LCRR_CLKDIV; -#endif - if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { -#if defined(CONFIG_FSL_CORENET) - /* If this is corenet based SoC, bit-representation - * for four times the clock divider values. - */ - lcrr_div *= 4; -#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \ - !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560) - /* - * Yes, the entire PQ38 family use the same - * bit-representation for twice the clock divider values. - */ - lcrr_div *= 2; -#endif - sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div; - } else { - /* In case anyone cares what the unknown value is */ - sys_info->freq_localbus = lcrr_div; - } + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_LBC_CLK_DIV; #endif #if defined(CONFIG_FSL_IFC) |