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authorMario Six <mario.six@gdsys.cc>2019-01-21 09:18:14 +0100
committerMario Six <mario.six@gdsys.cc>2019-05-21 07:52:33 +0200
commit7c2e535770f56f5788e3771b9ee2dbf40ec4d93f (patch)
tree4c6e27ee8f65f9ee14922bee82d59c8e097a0ccf /arch/powerpc/cpu/mpc83xx/cpu_init.c
parente35012e802de17c60cb38d0201ca4f1afb071d4c (diff)
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mpc83xx: Migrate CONFIG_LCRR_* to Kconfig
Migrate the CONFIG_LCRR_* settings to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx/cpu_init.c')
-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu_init.c22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 59faa78..af8faca 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -129,28 +129,6 @@ void cpu_init_f (volatile immap_t * im)
(CONFIG_SYS_SCCR_SATACM << SCCR_SATACM_SHIFT) |
#endif
0;
- __be32 lcrr_mask =
-#ifdef CONFIG_SYS_LCRR_DBYP /* PLL bypass */
- LCRR_DBYP |
-#endif
-#ifdef CONFIG_SYS_LCRR_EADC /* external address delay */
- LCRR_EADC |
-#endif
-#ifdef CONFIG_SYS_LCRR_CLKDIV /* system clock divider */
- LCRR_CLKDIV |
-#endif
- 0;
- __be32 lcrr_val =
-#ifdef CONFIG_SYS_LCRR_DBYP /* PLL bypass */
- CONFIG_SYS_LCRR_DBYP |
-#endif
-#ifdef CONFIG_SYS_LCRR_EADC
- CONFIG_SYS_LCRR_EADC |
-#endif
-#ifdef CONFIG_SYS_LCRR_CLKDIV /* system clock divider */
- CONFIG_SYS_LCRR_CLKDIV |
-#endif
- 0;
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);