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| author | Trevor Woerner <trevor@toganlabs.com> | 2019-05-03 09:40:56 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-18 08:15:34 -0400 |
| commit | b7b4af0e357f4cb2a1133ca8d8cec66cbd11de81 (patch) | |
| tree | aaea9613ce1dfb3a872587d6ef0c4fa7f639efbb /arch/nds32/cpu | |
| parent | 98b3156b0df4b0df9cb3a0bbfc240d0c4edd2638 (diff) | |
| download | u-boot-b7b4af0e357f4cb2a1133ca8d8cec66cbd11de81.zip u-boot-b7b4af0e357f4cb2a1133ca8d8cec66cbd11de81.tar.gz u-boot-b7b4af0e357f4cb2a1133ca8d8cec66cbd11de81.tar.bz2 | |
CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' case
According to De Morgan's Law[1]:
!(A && B) = !A || !B
!(A || B) = !A && !B
There are 5 places in the code where we find:
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
and 4 places in the code where we find:
#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))
In words, the construct:
!defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE on?"
and the construct:
defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
"is the [DI]CACHE off?"
Therefore
!(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
means:
"the opposite of 'are they both off?'"
in other words:
"are either or both on?"
and:
(!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
means:
"are either or both on?"
As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for
consistency.
[1] https://en.wikipedia.org/wiki/De_Morgan%27s_laws
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Diffstat (limited to 'arch/nds32/cpu')
| -rw-r--r-- | arch/nds32/cpu/n1213/start.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S index cf966e2..4e6a0e7 100644 --- a/arch/nds32/cpu/n1213/start.S +++ b/arch/nds32/cpu/n1213/start.S @@ -129,7 +129,7 @@ set_ivb: mfsr $r1, $mr8 and $r1, $r1, $r0 mtsr $r1, $mr8 -#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)) +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) /* * MMU_CTL NTC0 Cacheable/Write-Back */ |