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| author | Lukas Auer <lukas.auer@aisec.fraunhofer.de> | 2018-11-22 11:26:25 +0100 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2018-11-26 13:57:31 +0800 |
| commit | 2a23ac610709bc18b2becebb45abc7596b4d1e9c (patch) | |
| tree | a9ca7b04151fcbda9a104cc43e70604e3fe376df /arch/nds32/cpu | |
| parent | c55309c091853531ffa21937e652b321c4b650bb (diff) | |
| download | u-boot-2a23ac610709bc18b2becebb45abc7596b4d1e9c.zip u-boot-2a23ac610709bc18b2becebb45abc7596b4d1e9c.tar.gz u-boot-2a23ac610709bc18b2becebb45abc7596b4d1e9c.tar.bz2 | |
riscv: align mtvec on a 4-byte boundary
The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.
This patch also removes the global directive for trap_entry, which is
not required.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/nds32/cpu')
0 files changed, 0 insertions, 0 deletions