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| author | Weijie Gao <weijie.gao@mediatek.com> | 2021-03-05 11:13:27 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2021-04-22 02:44:42 +0200 |
| commit | ff6d1948dcdccf8a81590a989c05999f6a8a7645 (patch) | |
| tree | f15055c2237cfb8914a28ca2384cdaa23305ea91 /arch/mips/mach-mtmips | |
| parent | a9961e5acd5f918a4bf145a1f8b8df061fffe9c7 (diff) | |
| download | u-boot-ff6d1948dcdccf8a81590a989c05999f6a8a7645.zip u-boot-ff6d1948dcdccf8a81590a989c05999f6a8a7645.tar.gz u-boot-ff6d1948dcdccf8a81590a989c05999f6a8a7645.tar.bz2 | |
mips: mt7628: fix the displayed DDR type of mt7628
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes the displayed DDR type of mt7628.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/mips/mach-mtmips')
| -rw-r--r-- | arch/mips/mach-mtmips/mt7628/init.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/mach-mtmips/mt7628/init.c b/arch/mips/mach-mtmips/mt7628/init.c index 7c531ff..6b53512 100644 --- a/arch/mips/mach-mtmips/mt7628/init.c +++ b/arch/mips/mach-mtmips/mt7628/init.c @@ -68,6 +68,9 @@ int print_cpuinfo(void) val = readl(sysc + SYSCTL_EFUSE_CFG_REG); ee = val & EFUSE_MT7688; + if (pkg == PKG_ID_KN) + ddr = DRAM_DDR1; + printf("CPU: MediaTek MT%u%c ver:%u eco:%u\n", ee ? 7688 : 7628, pkg ? 'A' : 'K', ver, eco); |