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| author | Stefano Babic <sbabic@denx.de> | 2015-02-13 11:17:01 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-02-13 11:17:01 +0100 |
| commit | e72d344386bf80738fab7a6bd37cb321f443093a (patch) | |
| tree | d3e02055e6aa903ab80ef87c78d2f38e93981dcf /arch/mips/include/asm | |
| parent | 258c98f8d36ef35d7cb7604847ba73e64d702c2a (diff) | |
| parent | bd2a4888b123713adec271d6c8040ca9f609aa2f (diff) | |
| download | u-boot-e72d344386bf80738fab7a6bd37cb321f443093a.zip u-boot-e72d344386bf80738fab7a6bd37cb321f443093a.tar.gz u-boot-e72d344386bf80738fab7a6bd37cb321f443093a.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/mips/include/asm')
| -rw-r--r-- | arch/mips/include/asm/cacheops.h | 13 | ||||
| -rw-r--r-- | arch/mips/include/asm/config.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/malta.h | 5 |
3 files changed, 18 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index 6464250..75ec380 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h @@ -11,6 +11,19 @@ #ifndef __ASM_CACHEOPS_H #define __ASM_CACHEOPS_H +#ifndef __ASSEMBLY__ + +static inline void mips_cache(int op, const volatile void *addr) +{ +#ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE + __builtin_mips_cache(op, addr); +#else + __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr)) +#endif +} + +#endif /* !__ASSEMBLY__ */ + /* * Cache Operations available on all MIPS processors with R4000-style caches */ diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h index 1c8a42b..3a891ba 100644 --- a/arch/mips/include/asm/config.h +++ b/arch/mips/include/asm/config.h @@ -7,8 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_GENERIC_GLOBAL_DATA - #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h index 9e7c045..d9ffc15 100644 --- a/arch/mips/include/asm/malta.h +++ b/arch/mips/include/asm/malta.h @@ -64,4 +64,9 @@ #define PCI_CFG_PIIX4_GENCFG_SERIRQ (1 << 16) +#define PCI_CFG_PIIX4_IDETIM_PRI 0x40 +#define PCI_CFG_PIIX4_IDETIM_SEC 0x42 + +#define PCI_CFG_PIIX4_IDETIM_IDE (1 << 15) + #endif /* _MIPS_ASM_MALTA_H */ |