aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorMarek Vasut <marex@denx.de>2022-04-14 15:51:46 +0200
committerStefano Babic <sbabic@denx.de>2022-04-21 14:38:03 +0200
commit74f88b72219e178dc05d8c81e21048212b04cd09 (patch)
tree26b4b5f31723067405c6d823368697ffc9623cc0 /arch/arm
parent2e26a76eb0e2b80c3118267f065af0db58db654c (diff)
downloadu-boot-74f88b72219e178dc05d8c81e21048212b04cd09.zip
u-boot-74f88b72219e178dc05d8c81e21048212b04cd09.tar.gz
u-boot-74f88b72219e178dc05d8c81e21048212b04cd09.tar.bz2
ARM: imx: imx8m: Fix board_get_usable_ram_top()
The 4 GiB boundary is at 0xffffffff+1 , not at 0x80000000, fix this. The PHYS_SDRAM of i.MX8M is at 0x40000000 , so to restrict ram_top below 4 GiB, the ram_top has to be set to 0xffffffff as it is not an offset from the start of PHYS_SDRAM, but rather a physical address marking the topmost allowed DRAM address. Fixes: e27bddff4b9 ("imx8m: Restrict usable memory to space below 4G boundary") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 8171631..e7fe7c2 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -331,7 +331,7 @@ phys_size_t get_effective_memsize(void)
ulong board_get_usable_ram_top(ulong total_size)
{
- ulong top_addr = PHYS_SDRAM + gd->ram_size;
+ ulong top_addr;
/*
* Some IPs have their accessible address space restricted by
@@ -339,8 +339,7 @@ ulong board_get_usable_ram_top(ulong total_size)
* space below the 4G address boundary (which is 3GiB big),
* even when the effective available memory is bigger.
*/
- if (top_addr > 0x80000000)
- top_addr = 0x80000000;
+ top_addr = clamp_val((u64)PHYS_SDRAM + gd->ram_size, 0, 0xffffffff);
/*
* rom_pointer[0] stores the TEE memory start address.