aboutsummaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorHeinrich Schuchardt <xypron.glpk@gmx.de>2020-12-25 16:22:27 +0100
committerStefano Babic <sbabic@denx.de>2020-12-26 14:56:09 +0100
commite6abe163bf0b81d2ff6cfbc849252bb30b0d6a19 (patch)
treedac559d8e83fe001e601b14a12bbe4a5903729ff /arch/arm
parent37648b600cd16848e689e341b20da71356e24212 (diff)
downloadu-boot-e6abe163bf0b81d2ff6cfbc849252bb30b0d6a19.zip
u-boot-e6abe163bf0b81d2ff6cfbc849252bb30b0d6a19.tar.gz
u-boot-e6abe163bf0b81d2ff6cfbc849252bb30b0d6a19.tar.bz2
imx: mx7: clock: use correct format strings
Use %u and not %d for unsigned values. Print kHz and not khz. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-imx/mx7/clock.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index aba9461..6a1bad8 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -916,7 +916,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (5 == i) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
}
@@ -936,7 +936,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (best == 0) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
@@ -1115,17 +1115,17 @@ int do_mx7_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
printf("\n");
- printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
- printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
+ printf("IPG %8u kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
+ printf("UART %8u kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
#ifdef CONFIG_MXC_SPI
- printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
+ printf("CSPI %8u kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
#endif
- printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
- printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
- printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
- printf("USDHC1 %8d kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
- printf("USDHC2 %8d kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
- printf("USDHC3 %8d kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
+ printf("AHB %8u kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
+ printf("AXI %8u kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
+ printf("DDR %8u kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
+ printf("USDHC1 %8u kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
+ printf("USDHC2 %8u kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
+ printf("USDHC3 %8u kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
return 0;
}