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| author | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2018-03-26 15:27:33 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-04-15 11:44:13 +0200 |
| commit | 1ab1ffded4f1363080324d96a12fd76c90175be2 (patch) | |
| tree | d6d5c95609a53fe712a53b351a9d3c35402f3c13 /arch/arm | |
| parent | ca83182226d2300722ebbb44e8f291678606b568 (diff) | |
| download | u-boot-1ab1ffded4f1363080324d96a12fd76c90175be2.zip u-boot-1ab1ffded4f1363080324d96a12fd76c90175be2.tar.gz u-boot-1ab1ffded4f1363080324d96a12fd76c90175be2.tar.bz2 | |
imx: mx7: Add comment to describe OTP TESTER registers
The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".
This patch documents the properties of the registers; in summary.
31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
The 64 bits of data generate a unique serial number per-chip.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/mx7/soc.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 1602585..fb92a26 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -202,6 +202,27 @@ int arch_misc_init(void) #endif #ifdef CONFIG_SERIAL_TAG +/* + * OCOTP_TESTER + * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016 + * OCOTP_TESTER describes a unique ID based on silicon wafer + * and die X/Y position + * + * OCOTOP_TESTER offset 0x410 + * 31:0 fuse 0 + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID + * + * OCOTP_TESTER1 offset 0x420 + * 31:24 fuse 1 + * The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID + * 23:16 fuse 1 + * The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID + * 15:11 fuse 1 + * The wafer number of the wafer on which the device was fabricated/SJC + * CHALLENGE/ Unique ID + * 10:0 fuse 1 + * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID + */ void get_board_serial(struct tag_serialnr *serialnr) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; |