diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-07-22 13:38:31 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-07-24 00:17:15 +0900 |
| commit | 4bab70a77d062582db89946b3e3a75f6e27a92ee (patch) | |
| tree | 5a27523584db6c44435f9d62e2492b80364dcf48 /arch/arm/mach-uniphier/arm32/lowlevel_init.S | |
| parent | ebab100a988e62a27ccde0372487daeeb8cb3050 (diff) | |
| download | u-boot-4bab70a77d062582db89946b3e3a75f6e27a92ee.zip u-boot-4bab70a77d062582db89946b3e3a75f6e27a92ee.tar.gz u-boot-4bab70a77d062582db89946b3e3a75f6e27a92ee.tar.bz2 | |
ARM: uniphier: rename outer-cache register macros
Sync register macros with Linux code. This will be helpful to
develop the counterpart of Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/arm32/lowlevel_init.S')
| -rw-r--r-- | arch/arm/mach-uniphier/arm32/lowlevel_init.S | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index cc34116..8e32b35 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -1,5 +1,7 @@ /* - * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2012-2015 Panasonic Corporation + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -94,26 +96,26 @@ ENTRY(setup_init_ram) */ 0: /* - * set SSCOQM, SSCOQAD, SSCOQSZ, SSCOQWN in this order + * set UNIPHIER_SSCOQM, UNIPHIER_SSCOQAD, UNIPHIER_SSCOQSZ, UNIPHIER_SSCOQWN in this order */ ldr r0, = 0x00408006 @ touch to zero with address range - ldr r1, = SSCOQM + ldr r1, = UNIPHIER_SSCOQM str r0, [r1] ldr r0, = BOOT_RAM_BASE - ldr r1, = SSCOQAD + ldr r1, = UNIPHIER_SSCOQAD str r0, [r1] ldr r0, = BOOT_RAM_SIZE - ldr r1, = SSCOQSZ + ldr r1, = UNIPHIER_SSCOQSZ str r0, [r1] ldr r0, = BOOT_WAY_BITS - ldr r1, = SSCOQWN + ldr r1, = UNIPHIER_SSCOQWN str r0, [r1] - ldr r1, = SSCOPPQSEF + ldr r1, = UNIPHIER_SSCOPPQSEF ldr r0, [r1] cmp r0, #0 @ check if the command is successfully set bne 0b @ try again if an error occurs - ldr r1, = SSCOLPQS + ldr r1, = UNIPHIER_SSCOLPQS 1: ldr r0, [r1] cmp r0, #0x4 |