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| author | Stefan Mavrodiev <stefan@olimex.com> | 2019-07-31 16:15:52 +0300 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-10-25 14:15:49 +0530 |
| commit | e6467df1eb3acc238c14a712c46c41bd5c9b1e52 (patch) | |
| tree | a088f86ec836fef5c02de9bb011ef4a10d6821aa /arch/arm/mach-sunxi | |
| parent | 4ed293ae794b42ca216c53706d9476c3f3126197 (diff) | |
| download | u-boot-e6467df1eb3acc238c14a712c46c41bd5c9b1e52.zip u-boot-e6467df1eb3acc238c14a712c46c41bd5c9b1e52.tar.gz u-boot-e6467df1eb3acc238c14a712c46c41bd5c9b1e52.tar.bz2 | |
sunxi: Fix pll1 clock calculation
clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
sun6i: 1008000000
sun8i: 1008000000
sun50i: 816000000
With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
(24MHz * 28 * 3) / 2 = 1008MHz
However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
(24MHz * 28 * 3) / 2 = 792MHz
Changing k to 4 satisfies both system clocks:
(24E6 * 21 * 4) / 2 = 1008MHz
(24E6 * 17 * 4) / 2 = 816MHz
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
| -rw-r--r-- | arch/arm/mach-sunxi/clock_sun6i.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index 1628f3a..6ca38f7 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -118,7 +118,7 @@ void clock_set_pll1(unsigned int clk) if (clk > 1152000000) { k = 2; } else if (clk > 768000000) { - k = 3; + k = 4; m = 2; } |