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| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2021-01-11 21:11:40 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2021-01-25 21:52:00 +0000 |
| commit | b18bd53d6cde6cd458f279a667eaaf6082c1af45 (patch) | |
| tree | 4cd1c15121f33323a7a0f6a0e542b655155dc175 /arch/arm/mach-sunxi | |
| parent | c0b417b2f1a313a5fee5d08eda4a886a9950d1ed (diff) | |
| download | u-boot-b18bd53d6cde6cd458f279a667eaaf6082c1af45.zip u-boot-b18bd53d6cde6cd458f279a667eaaf6082c1af45.tar.gz u-boot-b18bd53d6cde6cd458f279a667eaaf6082c1af45.tar.bz2 | |
sunxi: introduce support for H616 clocks
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
| -rw-r--r-- | arch/arm/mach-sunxi/clock_sun50i_h6.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c index 6bd4669..06d84eb 100644 --- a/arch/arm/mach-sunxi/clock_sun50i_h6.c +++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c @@ -68,6 +68,9 @@ void clock_set_pll1(unsigned int clk) /* clk = 24*n/p, p is ignored if clock is >288MHz */ writel(CCM_PLL1_CTRL_EN | CCM_PLL1_LOCK_EN | CCM_PLL1_CLOCK_TIME_2 | +#ifdef CONFIG_MACH_SUN50I_H616 + CCM_PLL1_OUT_EN | +#endif CCM_PLL1_CTRL_N(clk / 24000000), &ccm->pll1_cfg); while (!(readl(&ccm->pll1_cfg) & CCM_PLL1_LOCK)) {} @@ -83,6 +86,7 @@ unsigned int clock_get_pll6(void) { struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + int m = IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? 4 : 2; uint32_t rval = readl(&ccm->pll6_cfg); int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT); @@ -90,8 +94,8 @@ unsigned int clock_get_pll6(void) CCM_PLL6_CTRL_DIV1_SHIFT) + 1; int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> CCM_PLL6_CTRL_DIV2_SHIFT) + 1; - /* The register defines PLL6-4X, not plain PLL6 */ - return 24000000 / 4 * n / div1 / div2; + /* The register defines PLL6-2X or PLL6-4X, not plain PLL6 */ + return 24000000 / m * n / div1 / div2; } int clock_twi_onoff(int port, int state) |