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| author | Icenowy Zheng <icenowy@aosc.io> | 2018-07-21 16:20:20 +0800 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-07-31 11:38:13 +0530 |
| commit | cadc7c20e57d10ff2d8c1272cd3ffa4e0bb39caa (patch) | |
| tree | ebc137e909da967259b67ccd5094bd21b4207ad7 /arch/arm/mach-sunxi | |
| parent | dddc4b4af3a444ef78d1a3d983aae71179a0d92c (diff) | |
| download | u-boot-cadc7c20e57d10ff2d8c1272cd3ffa4e0bb39caa.zip u-boot-cadc7c20e57d10ff2d8c1272cd3ffa4e0bb39caa.tar.gz u-boot-cadc7c20e57d10ff2d8c1272cd3ffa4e0bb39caa.tar.bz2 | |
sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS
The new Allwinner H6 SoC has its SRAM A1 at neither 0x0 nor 0x10000, but
it's at 0x20000. Thus the SUNXI_HIGH_SRAM option needs to be refactored
to support this new configuration.
Change it to SUNXI_SRAM_ADDRESS, which holds the real address of SRAM
A1 in the memory map.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
| -rw-r--r-- | arch/arm/mach-sunxi/Kconfig | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 678e33d..ccf4b35 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -73,16 +73,15 @@ config SUN8I_RSB with various RSB based devices, such as AXP223, AXP8XX PMICs, and AC100/AC200 ICs. -config SUNXI_HIGH_SRAM - bool - default n +config SUNXI_SRAM_ADDRESS + hex + default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5 + default 0x0 ---help--- Older Allwinner SoCs have their mask boot ROM mapped just below 4GB, with the first SRAM region being located at address 0. Some newer SoCs map the boot ROM at address 0 instead and move the - SRAM to 64KB, just behind the mask ROM. - Chips using the latter setup are supposed to select this option to - adjust the addresses accordingly. + SRAM to a different address. config SUNXI_A64_TIMER_ERRATUM bool @@ -257,7 +256,6 @@ config MACH_SUN9I select CPU_V7A select DRAM_SUN9I select SUN6I_PRCM - select SUNXI_HIGH_SRAM select SUNXI_GEN_SUN6I select SUN8I_RSB select SUPPORT_SPL @@ -269,7 +267,6 @@ config MACH_SUN50I select PHY_SUN4I_USB select SUNXI_DE2 select SUNXI_GEN_SUN6I - select SUNXI_HIGH_SRAM select SUPPORT_SPL select SUNXI_DRAM_DW select SUNXI_DRAM_DW_32BIT @@ -281,7 +278,6 @@ config MACH_SUN50I_H5 bool "sun50i (Allwinner H5)" select ARM64 select MACH_SUNXI_H3_H5 - select SUNXI_HIGH_SRAM select FIT select SPL_LOAD_FIT |