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| author | Fabien Dessenne <fabien.dessenne@st.com> | 2019-10-30 14:38:30 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-01-07 11:13:25 -0500 |
| commit | 7bff971a145c9fa0aa59c61c1fe0081c6b2db6dd (patch) | |
| tree | e5f04e7011c88b626e833a6fea534354e7b1d16b /arch/arm/mach-stm32mp | |
| parent | ee16c9a60b582d48e80d132fd64c06e5bd4c90e0 (diff) | |
| download | u-boot-7bff971a145c9fa0aa59c61c1fe0081c6b2db6dd.zip u-boot-7bff971a145c9fa0aa59c61c1fe0081c6b2db6dd.tar.gz u-boot-7bff971a145c9fa0aa59c61c1fe0081c6b2db6dd.tar.bz2 | |
stm32mp1: reset coprocessor status at cold boot
Reset ResourceTableAddress and CoprocessorState at cold boot, preserve
these values at standby wakeup.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch/arm/mach-stm32mp')
| -rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index ed7d9f6..6a71465 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -35,7 +35,9 @@ #define TAMP_CR1 (STM32_TAMP_BASE + 0x00) #define PWR_CR1 (STM32_PWR_BASE + 0x00) +#define PWR_MCUCR (STM32_PWR_BASE + 0x14) #define PWR_CR1_DBP BIT(8) +#define PWR_MCUCR_SBF BIT(6) /* DBGMCU register */ #define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) @@ -206,6 +208,11 @@ int arch_cpu_init(void) security_init(); update_bootmode(); #endif + /* Reset Coprocessor state unless it wakes up from Standby power mode */ + if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { + writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); + writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + } #endif boot_mode = get_bootmode(); |