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| author | Siew Chin Lim <elly.siew.chin.lim@intel.com> | 2021-03-24 17:16:49 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2021-04-08 17:29:12 +0800 |
| commit | 3aef59f28083e2e3bd0c7ad91230f573123ec848 (patch) | |
| tree | be9cc3fabccad1497aec0a7fefd612a298957475 /arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | |
| parent | e2ffb1da1ddc442e4f48980e8524dd5b574012a2 (diff) | |
| download | u-boot-3aef59f28083e2e3bd0c7ad91230f573123ec848.zip u-boot-3aef59f28083e2e3bd0c7ad91230f573123ec848.tar.gz u-boot-3aef59f28083e2e3bd0c7ad91230f573123ec848.tar.bz2 | |
arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move duplicated function cm_get_qspi_controller_clk_hz to clock_manager.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index 11ddee5..798d374 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -70,8 +70,6 @@ int cm_basic_init(const void *blob); unsigned int cm_get_l4_sp_clk_hz(void); unsigned long cm_get_mpu_clk_hz(void); -unsigned int cm_get_qspi_controller_clk_hz(void); - #endif /* __ASSEMBLY__ */ #define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \ |