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| author | Urja Rannikko <urjaman@gmail.com> | 2020-05-13 19:15:20 +0000 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2020-05-22 20:53:20 +0800 |
| commit | 353ad95aa6562654726a91cb457f30d5f2a85f4c (patch) | |
| tree | d81efdb0f52dab86354a5e60d70d2e388a639c4c /arch/arm/mach-rockchip | |
| parent | 69cd0c463d4bd8b9c3c20c96640c612333947d7e (diff) | |
| download | u-boot-353ad95aa6562654726a91cb457f30d5f2a85f4c.zip u-boot-353ad95aa6562654726a91cb457f30d5f2a85f4c.tar.gz u-boot-353ad95aa6562654726a91cb457f30d5f2a85f4c.tar.bz2 | |
rockchip: spl: veyron speedy boots from SPI
Apparently speedy was forgotten from this list of veyron devices.
Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/mach-rockchip')
| -rw-r--r-- | arch/arm/mach-rockchip/spl.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index ec2f66d..46b32eb 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -53,7 +53,8 @@ u32 spl_boot_device(void) #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ - defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) + defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ + defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) return BOOT_DEVICE_SPI; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) |