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authorTom Rini <trini@konsulko.com>2021-06-28 18:32:07 -0400
committerTom Rini <trini@konsulko.com>2021-06-28 18:32:07 -0400
commit8fba49bc8efb5ab5ee63666c0ab6cf2130fd3059 (patch)
tree1869718fc35d2d7323041030a6468492f08c44b4 /arch/arm/mach-rmobile
parent296d5cffdd08298cb41fb82122f29f4c329df569 (diff)
parent0beaae223dd55b3f727f07f38b799a1c58612b1b (diff)
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Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into nextWIP/28Jun2021-next
- V3U Falcon board support
Diffstat (limited to 'arch/arm/mach-rmobile')
-rw-r--r--arch/arm/mach-rmobile/Kconfig.6412
-rw-r--r--arch/arm/mach-rmobile/Makefile4
-rw-r--r--arch/arm/mach-rmobile/cpu_info.c1
-rw-r--r--arch/arm/mach-rmobile/include/mach/rmobile.h1
-rw-r--r--arch/arm/mach-rmobile/psci-r8a779a0.c49
5 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index c621f8a..a6dcce1 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -57,6 +57,11 @@ config R8A77995
imply CLK_R8A77995
imply PINCTRL_PFC_R8A77995
+config R8A779A0
+ bool "Renesas SoC R8A779A0"
+ imply CLK_R8A779A0
+ imply PINCTRL_PFC_R8A779A0
+
config RZ_G2
bool "Renesas ARM SoCs RZ/G2 (64bit)"
@@ -108,6 +113,12 @@ config TARGET_EBISU
help
Support for Renesas R-Car Gen3 Ebisu platform
+config TARGET_FALCON
+ bool "Falcon board"
+ imply R8A779A0
+ help
+ Support for Renesas R-Car Gen3 Falcon platform
+
config TARGET_HIHOPE_RZG2
bool "HiHope RZ/G2 board"
imply R8A774A1
@@ -158,6 +169,7 @@ source "board/renesas/condor/Kconfig"
source "board/renesas/draak/Kconfig"
source "board/renesas/eagle/Kconfig"
source "board/renesas/ebisu/Kconfig"
+source "board/renesas/falcon/Kconfig"
source "board/renesas/salvator-x/Kconfig"
source "board/renesas/ulcb/Kconfig"
source "board/beacon/beacon-rzg2m/Kconfig"
diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile
index 81a0ded..195bbeb 100644
--- a/arch/arm/mach-rmobile/Makefile
+++ b/arch/arm/mach-rmobile/Makefile
@@ -15,6 +15,10 @@ obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o
obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o
+ifneq ($(CONFIG_R8A779A0),)
+obj-$(CONFIG_ARMV8_PSCI) += psci-r8a779a0.o
+endif
+
OBJCOPYFLAGS_u-boot-spl.srec := -O srec
quiet_cmd_objcopy = OBJCOPY $@
cmd_objcopy = $(OBJCOPY) --gap-fill=0x00 $(OBJCOPYFLAGS) \
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 9ec622b..2bb6d50 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -76,6 +76,7 @@ static const struct {
{ RMOBILE_CPU_TYPE_R8A77980, "R8A77980" },
{ RMOBILE_CPU_TYPE_R8A77990, "R8A77990" },
{ RMOBILE_CPU_TYPE_R8A77995, "R8A77995" },
+ { RMOBILE_CPU_TYPE_R8A779A0, "R8A779A0" },
{ 0x0, "CPU" },
};
diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h
index a688636..dc6f876 100644
--- a/arch/arm/mach-rmobile/include/mach/rmobile.h
+++ b/arch/arm/mach-rmobile/include/mach/rmobile.h
@@ -39,6 +39,7 @@
#define RMOBILE_CPU_TYPE_R8A77980 0x56
#define RMOBILE_CPU_TYPE_R8A77990 0x57
#define RMOBILE_CPU_TYPE_R8A77995 0x58
+#define RMOBILE_CPU_TYPE_R8A779A0 0x59
#ifndef __ASSEMBLY__
const u8 *rzg_get_cpu_name(void);
diff --git a/arch/arm/mach-rmobile/psci-r8a779a0.c b/arch/arm/mach-rmobile/psci-r8a779a0.c
new file mode 100644
index 0000000..6a85eb2
--- /dev/null
+++ b/arch/arm/mach-rmobile/psci-r8a779a0.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This file implements basic PSCI support for Renesas r8a779a0 SoC
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/secure.h>
+
+int __secure psci_features(u32 function_id, u32 psci_fid)
+{
+ switch (psci_fid) {
+ case ARM_PSCI_0_2_FN_PSCI_VERSION:
+ case ARM_PSCI_0_2_FN_SYSTEM_RESET:
+ return 0x0;
+ }
+ /* case ARM_PSCI_0_2_FN_CPU_ON: */
+ /* case ARM_PSCI_0_2_FN_CPU_OFF: */
+ /* case ARM_PSCI_0_2_FN_AFFINITY_INFO: */
+ /* case ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE: */
+ /* case ARM_PSCI_0_2_FN_SYSTEM_OFF: */
+ return ARM_PSCI_RET_NI;
+}
+
+u32 __secure psci_version(void)
+{
+ return ARM_PSCI_VER_0_2;
+}
+
+#define RST_BASE 0xE6160000 /* Domain0 */
+#define RST_SRESCR0 (RST_BASE + 0x18)
+#define RST_SPRES 0x5AA58000
+
+void __secure __noreturn psci_system_reset(void)
+{
+ writel(RST_SPRES, RST_SRESCR0);
+
+ while (1)
+ ;
+}
+
+int psci_update_dt(void *fdt)
+{
+ return 0;
+}