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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2019-12-31 15:49:55 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-01-03 09:47:11 -0500 |
| commit | 40109f4d7ed114cd473e5528b7b0a9a04be9207e (patch) | |
| tree | 239ac52926655007b8932829c4c1ae54efed628c /arch/arm/mach-k3/common.h | |
| parent | 196d3e4017735c82cb5aa4387a9c44174a8391ac (diff) | |
| download | u-boot-40109f4d7ed114cd473e5528b7b0a9a04be9207e.zip u-boot-40109f4d7ed114cd473e5528b7b0a9a04be9207e.tar.gz u-boot-40109f4d7ed114cd473e5528b7b0a9a04be9207e.tar.bz2 | |
arm: mach-k3: Enable WA for R5F deadlock
On K3 devices there are 2 conditions where R5F can deadlock:
1.When software is performing series of store operations to
cacheable write back/write allocate memory region and later
on software execute barrier operation (DSB or DMB). R5F may
hang at the barrier instruction.
2.When software is performing a mix of load and store operations
within a tight loop and store operations are all writing to
cacheable write back/write allocates memory regions, R5F may
hang at one of the load instruction.
To avoid the above two conditions disable linefill optimization
inside Cortex R5F which will make R5F to only issue up to 2 cache
line fills at any point of time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-k3/common.h')
| -rw-r--r-- | arch/arm/mach-k3/common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 8f9a023..35d1609 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -16,3 +16,4 @@ void setup_k3_mpu_regions(void); int early_console_init(void); +void disable_linefill_optimization(void); |