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| author | Fabio Estevam <fabio.estevam@nxp.com> | 2018-01-01 22:51:45 -0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-01-12 14:28:04 +0100 |
| commit | 6a2ccd64c3adc87687fe0f232e8775274ac1ae21 (patch) | |
| tree | 5e8c8a6c062df025724b71404772a6dcb71fd6ae /arch/arm/mach-imx/mx6/ddr.c | |
| parent | 67b71df277196f1649c366e52545f5bfccf56e03 (diff) | |
| download | u-boot-6a2ccd64c3adc87687fe0f232e8775274ac1ae21.zip u-boot-6a2ccd64c3adc87687fe0f232e8775274ac1ae21.tar.gz u-boot-6a2ccd64c3adc87687fe0f232e8775274ac1ae21.tar.bz2 | |
mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULL
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to
access it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
Diffstat (limited to 'arch/arm/mach-imx/mx6/ddr.c')
| -rw-r--r-- | arch/arm/mach-imx/mx6/ddr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 52a9a25..39dbd2f 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -908,7 +908,7 @@ void mx6sdl_dram_iocfg(unsigned width, #define MR(val, ba, cmd, cs1) \ ((val << 16) | (1 << 15) | (cmd << 4) | (cs1 << 3) | ba) #define MMDC1(entry, value) do { \ - if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl()) \ + if (!is_mx6sx() && !is_mx6ul() && !is_mx6ull() && !is_mx6sl()) \ mmdc1->entry = value; \ } while (0) @@ -1215,7 +1215,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, u16 mem_speed = ddr3_cfg->mem_speed; mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; - if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl()) + if (!is_mx6sx() && !is_mx6ul() && !is_mx6ull() && !is_mx6sl()) mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR; /* Limit mem_speed for MX6D/MX6Q */ |