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| author | Marek Vasut <marex@denx.de> | 2022-09-19 21:37:07 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-09-20 18:30:02 +0200 |
| commit | fdf6bbb260c36bb54826bffb4dd4d62b90c3cede (patch) | |
| tree | cca0acaf01010a37908c5fed7ee34aaad6a9a697 /arch/arm/include | |
| parent | 9bf0cbf396beaf3257698f672207ab7849134618 (diff) | |
| download | u-boot-fdf6bbb260c36bb54826bffb4dd4d62b90c3cede.zip u-boot-fdf6bbb260c36bb54826bffb4dd4d62b90c3cede.tar.gz u-boot-fdf6bbb260c36bb54826bffb4dd4d62b90c3cede.tar.bz2 | |
ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
Pull this LPGPR unlock into common code, since it is used in multiple
systems already.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index ff3b9dd..29d5baa 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -27,6 +27,7 @@ #define IOMUXC_GPR_BASE_ADDR 0x30340000 #define OCOTP_BASE_ADDR 0x30350000 #define ANATOP_BASE_ADDR 0x30360000 +#define SNVS_BASE_ADDR 0x30370000 #define CCM_BASE_ADDR 0x30380000 #define SRC_BASE_ADDR 0x30390000 #define GPC_BASE_ADDR 0x303A0000 @@ -113,6 +114,10 @@ #define SRC_DDR1_RCR_CORE_RESET_N_MASK BIT(1) #define SRC_DDR1_RCR_PRESET_N_MASK BIT(0) +#define SNVS_LPSR 0x4c +#define SNVS_LPLVDR 0x64 +#define SNVS_LPPGDR_INIT 0x41736166 + struct iomuxc_gpr_base_regs { u32 gpr[47]; }; |