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authorYe Li <ye.li@nxp.com>2022-07-26 16:41:06 +0800
committerStefano Babic <sbabic@denx.de>2022-07-26 11:29:01 +0200
commite631185a20ab730603d7bb04378e98a83d337735 (patch)
tree992459cdde0dc95eeb11e98ba09c91c2a7d2f482 /arch/arm/include
parent87650716eabcfc9341dfbf67c39ef01f9ca2d8a1 (diff)
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imx: imx9: clock: Add DDR clock support
Implement the DDR driver clock interfaces for set DDR rate and bypass DDR PLL Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-imx9/clock.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h
index fcf04d6..d96f126 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -213,6 +213,9 @@ void init_clk_usdhc(u32 index);
int enable_i2c_clk(unsigned char enable, u32 i2c_num);
u32 imx_get_i2cclk(u32 i2c_num);
u32 mxc_get_clock(enum mxc_clock clk);
+void dram_pll_init(ulong pll_val);
+void dram_enable_bypass(ulong clk_val);
+void dram_disable_bypass(void);
int ccm_clk_src_on(enum ccm_clk_src oscpll, bool enable);
int ccm_clk_src_auto(enum ccm_clk_src oscpll, bool enable);