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| author | Kever Yang <kever.yang@rock-chips.com> | 2019-11-15 11:04:37 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-11-17 16:23:56 +0800 |
| commit | d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e (patch) | |
| tree | f4468e0cb722d88a2945318af7522ab6ed36c214 /arch/arm/include | |
| parent | c7becc3a2b1895e55dbbcc06b343178c8d8041f9 (diff) | |
| download | u-boot-d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e.zip u-boot-d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e.tar.gz u-boot-d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e.tar.bz2 | |
ram: rockchip: add common code for sdram driver
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/sdram_common.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h index cd3d7f9..36d3115 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -6,6 +6,15 @@ #ifndef _ASM_ARCH_SDRAM_COMMON_H #define _ASM_ARCH_SDRAM_COMMON_H +#ifndef MHZ +#define MHZ (1000 * 1000) +#endif + +#define PATTERN (0x5aa5f00f) + +#define MIN(a, b) (((a) > (b)) ? (b) : (a)) +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) + struct sdram_cap_info { unsigned int rank; /* dram column number, 0 means this channel is invalid */ @@ -125,4 +134,26 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info, void sdram_print_stride(unsigned int stride); #endif /* CONFIG_RAM_ROCKCHIP_DEBUG */ +void sdram_org_config(struct sdram_cap_info *cap_info, + struct sdram_base_params *base, + u32 *p_os_reg2, u32 *p_os_reg3, u32 channel); + +int sdram_detect_bw(struct sdram_cap_info *cap_info); +int sdram_detect_cs(struct sdram_cap_info *cap_info); +int sdram_detect_col(struct sdram_cap_info *cap_info, + u32 coltmp); +int sdram_detect_bank(struct sdram_cap_info *cap_info, + u32 coltmp, u32 bktmp); +int sdram_detect_bg(struct sdram_cap_info *cap_info, + u32 coltmp); +int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type); +int sdram_detect_row(struct sdram_cap_info *cap_info, + u32 coltmp, u32 bktmp, u32 rowtmp); +int sdram_detect_row_3_4(struct sdram_cap_info *cap_info, + u32 coltmp, u32 bktmp); +int sdram_detect_high_row(struct sdram_cap_info *cap_info); +int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type); +u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type); +void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n); + #endif |