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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2019-11-12 19:28:38 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2019-11-27 16:55:56 +0800 |
| commit | d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1 (patch) | |
| tree | 1e93247139eff9a521651669e8183f274383f105 /arch/arm/include | |
| parent | d9114e2b73552be7f9035c7567ea14febefa0dce (diff) | |
| download | u-boot-d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1.zip u-boot-d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1.tar.gz u-boot-d3eb317ea50ef763a5a1ef5ff4e2bc19498542d1.tar.bz2 | |
arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/clock.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/clock.h | 1 |
2 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/clock.h b/arch/arm/include/asm/arch-fsl-layerscape/clock.h index b37a08d..95d6156 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/clock.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/clock.h @@ -14,8 +14,6 @@ enum mxc_clock { MXC_ARM_CLK = 0, MXC_BUS_CLK, MXC_UART_CLK, - MXC_ESDHC_CLK, - MXC_ESDHC2_CLK, MXC_I2C_CLK, MXC_DSPI_CLK, }; diff --git a/arch/arm/include/asm/arch-ls102xa/clock.h b/arch/arm/include/asm/arch-ls102xa/clock.h index bf67df5..e66e57f 100644 --- a/arch/arm/include/asm/arch-ls102xa/clock.h +++ b/arch/arm/include/asm/arch-ls102xa/clock.h @@ -12,7 +12,6 @@ enum mxc_clock { MXC_ARM_CLK = 0, MXC_UART_CLK, - MXC_ESDHC_CLK, MXC_I2C_CLK, MXC_DSPI_CLK, }; |