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author | Tom Rini <trini@konsulko.com> | 2022-06-27 13:35:47 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-07-08 17:57:33 -0400 |
commit | 95cc3efcc1ec22be2c649ef4cdc065fa9f7fb697 (patch) | |
tree | 38a22a6aae38cb1e4a9216529d11f4f18febe18e /arch/arm/include | |
parent | 38d091ac1d2d57612adb53b802609a7c3dcdbe3d (diff) | |
download | u-boot-95cc3efcc1ec22be2c649ef4cdc065fa9f7fb697.zip u-boot-95cc3efcc1ec22be2c649ef4cdc065fa9f7fb697.tar.gz u-boot-95cc3efcc1ec22be2c649ef4cdc065fa9f7fb697.tar.bz2 |
arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-sa1100/bitfield.h | 112 | ||||
-rw-r--r-- | arch/arm/include/asm/proc-armv/system.h | 3 |
2 files changed, 1 insertions, 114 deletions
diff --git a/arch/arm/include/asm/arch-sa1100/bitfield.h b/arch/arm/include/asm/arch-sa1100/bitfield.h deleted file mode 100644 index 104a21c..0000000 --- a/arch/arm/include/asm/arch-sa1100/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h index c61374e..a1f59d9 100644 --- a/arch/arm/include/asm/proc-armv/system.h +++ b/arch/arm/include/asm/proc-armv/system.h @@ -163,8 +163,7 @@ #endif /* CONFIG_ARM64 */ -#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) || \ - defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) /* * On the StrongARM, "swp" is terminally broken since it bypasses the * cache totally. This means that the cache becomes inconsistent, and, |