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authorWolfgang Denk <wd@denx.de>2012-05-20 21:31:26 +0200
committerWolfgang Denk <wd@denx.de>2012-05-20 21:31:26 +0200
commitee3a55fdf00b54391e406217e53674449e70d78b (patch)
tree0c7edb3ba668e5a215c42e8b1429cc3f394351b2 /arch/arm/include/asm/arch-mx5
parent6bc337fb13003a9a949dfb2713e308fb97faae8a (diff)
parent2ca4a209a5b961ad1be8782c68dabe326d77dfaf (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits) OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT ARM: omap3: Set SPL stack size to 8KB, image to 54KB. arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree omap4: do not enable auxiliary cores omap4: do not enable fs-usb module omap4: panda: disable uart2 pads during boot igep00x0: change mpurate from 500 to auto igep00x0: enable the use of a plain text file tegra2: trivially enable 13 mhz crystal frequency tegra: Enable keyboard for Seaboard tegra: Switch on console mux and use environment for console tegra: Add tegra keyboard driver tegra: fdt: Add keyboard definitions for Seaboard tegra: fdt: Add keyboard controller definition tegra: Add keyboard support to funcmux input: Add support for keyboard matrix decoding from an fdt input: Add generic keyboard input handler input: Add linux/input.h for key code support fdt: Add fdtdec functions to read byte array tegra: Enable LP0 on Seaboard tegra: fdt: Add EMC data for Tegra2 Seaboard tegra: i2c: Add function to find DVC bus fdt: tegra: Add EMC node to device tree tegra: Add EMC settings for Seaboard tegra: Turn off power detect in board init tegra: Set up warmboot code on Nvidia boards tegra: Setup PMC scratch info from ap20 setup tegra: Add warmboot implementation tegra: Set up PMU for Nvidia boards tegra: Add PMU to manage power supplies tegra: Add EMC support for optimal memory timings tegra: Add header file for APB_MISC register tegra: Add tegra_get_chip_type() to detect SKU tegra: Add flow, gp_padctl, fuse, sdram headers tegra: Add crypto library for warmboot code tegra: Add functions to access low-level Osc/PLL details tegra: Move ap20.h header into arch location Add AES crypto library i2c: Add TPS6586X driver Add abs() macro to return absolute value fdt: Add function to return next compatible subnode fdt: Add function to locate an array in the device tree i.MX28: Avoid redefining serial_put[cs]() i.MX28: Check if WP detection is implemented at all i.MX28: Add battery boot components to SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Add LRADC register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LCDIF register definitions i.MX28: Implement boot pads sampling and reporting i.MX28: Improve passing of data from SPL to U-Boot M28EVK: Add SD update command M28EVK: Implement support for new board V2.0 FEC: Abstract out register setup MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged i.MX28: Add delay after CPU bypass is cleared spi: mxs: Allow other chip selects to work spi: mxs: Introduce spi_cs_is_valid() mx53loco: Remove unneeded gpio_set_value() mx53loco: Add CONFIG_REVISION_TAG mx53loco: Turn on VUSB regulator mx53loco: Add mc34708 support and set mx53 frequency at 1GHz pmic: dialog: Avoid name conflicts imx: Add u-boot.imx as target for ARM9 i.MX SOCs i.MX2: Include asm/types.h in arch-mx25/imx-regs.h imx: usb: There is no such register i.MX25: usb: Set PORTSCx register imx: nand: Support flash based BBT i.MX25: This architecture has a GPIO4 too i.MX25: esdhc: Add mxc_get_clock infrastructure i.MX6: mx6q_sabrelite: add SATA bindings i.MX6: add enable_sata_clock() i.MX6: Add ANATOP regulator init mx28evk: add NAND support USB: ehci-mx6: Fix broken IO access M28: Scan only first 512 MB of DRAM to avoid memory wraparound Revert "i.MX28: Enable additional DRAM address bits" M28: Enable FDT support mx53loco: Add support for 1GHz operation for DA9053-based boards mx53loco: Allow to print CPU information at a later stage mx5: Add clock config interface imx-common: Factor out get_ahb_clk() i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow mx31pdk: Allow booting a zImage kernel mx6qarm2: Allow booting a zImage kernel mx6qsabrelite: Allow booting a zImage kernel mx28evk: Allow booting a zImage kernel m28evk: Allow to booting a dt kernel mx28evk: Allow to booting a dt kernel mx6qsabrelite: No need to set the direction for GPIO3_23 again pmic: Add support for the Dialog DA9053 PMIC MX53: mx53loco: Add SATA support MX53: Add support to ESG ima3 board SATA: add driver for MX5 / MX6 SOCs MX53: add function to set SATA clock to internal SATA: check for return value from sata functions MX5: Add definitions for SATA controller NET: fec_mxc.c: Add a way to disable auto negotiation Define UART4 and UART5 base addresses EXYNOS: Change bits per pixel value proper for u-boot. EXYNOS: support TRATS board display function LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI EXYNOS: support EXYNOS MIPI DSI interface driver. EXYNOS: support EXYNOS framebuffer and FIMD display drivers. LCD: add data structure for EXYNOS display driver EXYNOS: add LCD and MIPI DSI clock interface. EXYNOS: definitions of system resgister and power management registers. SMDK5250: fix compiler warning misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998 misc:pmic:max8997 MAX8997 support for PMIC driver TRATS: modify the trats's configuration ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT cm-t35: add I2C multi-bus support include/configs: Remove CONFIG_SYS_64BIT_STRTOUL include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF omap3: Introduce weak misc_init_r omap730p2: Remove empty misc_init_r omap5912osk: Remove empty misc_init_r omap4+: Remove CONFIG_ARCH_CPU_INIT omap4: Remove CONFIG_SYS_MMC_SET_DEV OMAP3: pandora: drop console kernel argument OMAP3: pandora: revise GPIO configuration ...
Diffstat (limited to 'arch/arm/include/asm/arch-mx5')
-rw-r--r--arch/arm/include/asm/arch-mx5/clock.h7
-rw-r--r--arch/arm/include/asm/arch-mx5/crm_regs.h6
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h11
-rw-r--r--arch/arm/include/asm/arch-mx5/iomux.h4
-rw-r--r--arch/arm/include/asm/arch-mx5/sys_proto.h3
5 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index ea972a3..35ee815 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -32,6 +32,10 @@ enum mxc_clock {
MXC_UART_CLK,
MXC_CSPI_CLK,
MXC_FEC_CLK,
+ MXC_SATA_CLK,
+ MXC_DDR_CLK,
+ MXC_NFC_CLK,
+ MXC_PERIPH_CLK,
};
unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
@@ -39,10 +43,11 @@ unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
u32 imx_get_uartclk(void);
u32 imx_get_fecclk(void);
unsigned int mxc_get_clock(enum mxc_clock clk);
-
+int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
void set_usb_phy2_clk(void);
void enable_usb_phy2_clk(unsigned char enable);
void set_usboh3_clk(void);
void enable_usboh3_clk(unsigned char enable);
+void mxc_set_sata_internal_clock(void);
#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h
index bdeafbc..4e0fc1b 100644
--- a/arch/arm/include/asm/arch-mx5/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx5/crm_regs.h
@@ -76,6 +76,9 @@ struct mxc_ccm_reg {
u32 CCGR4;
u32 CCGR5;
u32 CCGR6; /* 0x0080 */
+#ifdef CONFIG_MX53
+ u32 CCGR7; /* 0x0084 */
+#endif
u32 cmeor;
};
@@ -84,6 +87,9 @@ struct mxc_ccm_reg {
#define MXC_CCM_CACRR_ARM_PODF_MASK 0x7
/* Define the bits in register CBCDR */
+#define MXC_CCM_CBCDR_DDR_HIFREQ_SEL (0x1 << 30)
+#define MXC_CCM_CBCDR_DDR_PODF_MASK (0x7 << 27)
+#define MXC_CCM_CBCDR_DDR_PODF_OFFSET 27
#define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26)
#define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25)
#define MXC_CCM_CBCDR_EMI_PODF_OFFSET 22
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4fa6658..cef4190 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -43,6 +43,7 @@
#define NFC_BASE_ADDR_AXI 0xF7FF0000
#define IRAM_BASE_ADDR 0xF8000000
#define CS1_BASE_ADDR 0xF4000000
+#define SATA_BASE_ADDR 0x10000000
#else
#error "CPU_TYPE not defined"
#endif
@@ -93,6 +94,7 @@
#define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000)
#define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000)
#define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000)
+#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000)
#endif
/*
* AIPS 2
@@ -133,6 +135,10 @@
#define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000)
#define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000)
+#if defined(CONFIG_MX53)
+#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000)
+#endif
+
/*
* WEIM CSnGCR1
*/
@@ -485,6 +491,11 @@ struct iim_regs {
} bank[4];
};
+struct fuse_bank0_regs {
+ u32 fuse0_23[24];
+ u32 gp[8];
+};
+
struct fuse_bank1_regs {
u32 fuse0_8[9];
u32 mac_addr[6];
diff --git a/arch/arm/include/asm/arch-mx5/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h
index 760371b..e3765a3 100644
--- a/arch/arm/include/asm/arch-mx5/iomux.h
+++ b/arch/arm/include/asm/arch-mx5/iomux.h
@@ -66,8 +66,8 @@ typedef enum iomux_pad_config {
PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */
PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */
PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */
- PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */
- PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */
+ PAD_CTL_DRV_VOT_LOW = 0x1 << 13, /* Low voltage mode */
+ PAD_CTL_DRV_VOT_HIGH = 0x0 << 13,/* High voltage mode */
} iomux_pad_config_t;
/* various IOMUX input functions */
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index 13d12ee..7b5246e 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -35,5 +35,8 @@ void set_chipselect_size(int const);
*/
int fecmxc_initialize(bd_t *bis);
+u32 get_ahb_clk(void);
+u32 get_periph_clk(void);
+char *get_reset_cause(void);
#endif