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| author | Laurentiu Tudor <laurentiu.tudor@nxp.com> | 2019-02-26 13:18:33 +0200 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-03-03 22:01:09 +0530 |
| commit | e82d9ee73a2ab6ae76999f4eb37807af7e38cdc0 (patch) | |
| tree | acb55c5951b623566bfc13b2d0793438004cc3f1 /arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | |
| parent | d8d5fdb7b2ab9154beee2936082bfb65bf4d9209 (diff) | |
| download | u-boot-e82d9ee73a2ab6ae76999f4eb37807af7e38cdc0.zip u-boot-e82d9ee73a2ab6ae76999f4eb37807af7e38cdc0.tar.gz u-boot-e82d9ee73a2ab6ae76999f4eb37807af7e38cdc0.tar.bz2 | |
armv8: fsl-layerscape: fix SEC QI ICID setup
The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h index f375fe7..e7a8801 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -93,8 +93,7 @@ void fdt_fixup_icid(void *blob); #define SET_SEC_QI_ICID(streamid) \ SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ - (((streamid) << 16) | (streamid)), \ - offsetof(ccsr_sec_t, qilcr_ls) + \ + 0, offsetof(ccsr_sec_t, qilcr_ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \ CONFIG_SYS_FSL_SEC_ADDR) |