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author | Michal Simek <michal.simek@xilinx.com> | 2020-11-26 14:25:02 +0100 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2021-03-30 12:03:24 +0200 |
commit | ce90654d1c150549312c2c58e2b30de099d2265e (patch) | |
tree | 7c569703ab6e54f41d62a3988f4ffb37a3bb9dd6 /arch/arm/dts/zynqmp-zcu111-revA.dts | |
parent | dd4c6427571ce45c913628771cc8221ac3c22e9e (diff) | |
download | u-boot-ce90654d1c150549312c2c58e2b30de099d2265e.zip u-boot-ce90654d1c150549312c2c58e2b30de099d2265e.tar.gz u-boot-ce90654d1c150549312c2c58e2b30de099d2265e.tar.bz2 |
xilinx: Sync DTs with Linux kernel
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:
- ARM: zynq: Fix leds subnode name for zc702/zybo-z7
- arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Wire up the DisplayPort subsystem
- arm64: dts: zynqmp: Add DisplayPort subsystem
- arm64: dts: zynqmp: Add DPDMA node
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
- arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
- arm64: dts: xilinx: align GPIO hog names with dtschema
- arm64: zynqmp: Add Xilinx AES node
- dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA
but also some other changes have been done.
- Using only one compatible string for adxl345 on zturn
- Remove Xilinx internal DP bindings
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Resort nvmem_firmware
- Update nand compatible string
- Aling power-domains property for sd0/1
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu111-revA.dts')
-rw-r--r-- | arch/arm/dts/zynqmp-zcu111-revA.dts | 78 |
1 files changed, 64 insertions, 14 deletions
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 82e6c8d..9e47008 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -121,6 +121,13 @@ compatible = "iio-hwmon"; io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>; }; + + /* 48MHz reference crystal */ + ref48: ref48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; }; &dcc { @@ -386,10 +393,46 @@ #size-cells = <0>; reg = <1>; si5341: clock-generator@36 { /* SI5341 - u46 */ - compatible = "si5341"; + compatible = "silabs,si5341"; reg = <0x36>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&ref48>; + clock-names = "xtal"; + clock-output-names = "si5341"; + + si5341_0: out@0 { + /* refclk0 for PS-GT, used for DP */ + reg = <0>; + always-on; + }; + si5341_2: out@2 { + /* refclk2 for PS-GT, used for USB3 */ + reg = <2>; + always-on; + }; + si5341_3: out@3 { + /* refclk3 for PS-GT, used for SATA */ + reg = <3>; + always-on; + }; + si5341_5: out@5 { + /* refclk5 PL CLK100 */ + reg = <5>; + always-on; + }; + si5341_6: out@6 { + /* refclk6 PL CLK125 */ + reg = <6>; + always-on; + }; + si5341_9: out@9 { + /* refclk9 used for PS_REF_CLK 33.3 MHz */ + reg = <9>; + always-on; + }; }; - }; i2c@2 { #address-cells = <1>; @@ -423,8 +466,8 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - si5328: clock-generator@69 { /* SI5328 - u48 */ - compatible = "silabs,si5328"; + si5382: clock-generator@69 { /* SI5382 - u48 */ + compatible = "silabs,si5382"; reg = <0x69>; }; }; @@ -511,6 +554,13 @@ }; }; +&psgtr { + status = "okay"; + /* nc, sata, usb3, dp */ + clocks = <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>; + clock-names = "ref1", "ref2", "ref3"; +}; + &qspi { status = "okay"; is-dual = <1>; @@ -557,7 +607,7 @@ ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; phy-names = "sata-phy"; - phys = <&lane3 PHY_TYPE_SATA 1 3 125000000>; + phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; }; /* SD1 with level shifter */ @@ -571,10 +621,6 @@ xlnx,mio-bank = <1>; }; -&serdes { - status = "okay"; -}; - &uart0 { status = "okay"; }; @@ -582,12 +628,16 @@ /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + dr_mode = "host"; }; -&dwc3_0 { +&zynqmp_dpdma { status = "okay"; - dr_mode = "host"; - snps,usb3_lpm_capable; - phy-names = "usb3-phy"; - phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>; +}; + +&zynqmp_dpsub { + status = "okay"; + phy-names = "dp-phy0", "dp-phy1"; + phys = <&psgtr 1 PHY_TYPE_DP 0 1>, + <&psgtr 0 PHY_TYPE_DP 1 1>; }; |