aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/dts/zynq-cse-qspi-x1-single.dts
diff options
context:
space:
mode:
authorMichal Simek <michal.simek@amd.com>2023-10-26 16:04:49 +0200
committerMichal Simek <michal.simek@amd.com>2023-11-07 13:47:09 +0100
commitda10dd10e0128dd32769d333559f44052c3a8245 (patch)
tree9f9436f58bd841095d623ca75b0bc277592498e2 /arch/arm/dts/zynq-cse-qspi-x1-single.dts
parent1cd59c571cfc7f0c9813e64f81ca1d95380a7e22 (diff)
downloadu-boot-da10dd10e0128dd32769d333559f44052c3a8245.zip
u-boot-da10dd10e0128dd32769d333559f44052c3a8245.tar.gz
u-boot-da10dd10e0128dd32769d333559f44052c3a8245.tar.bz2
ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non volatile memories. There are different configurations which qspi can be that's why describe them via DT. DT binding is already approved that's why there is no reason not to add it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/28b3cdd7e91b2b4c3c36d0bf65aa5bac042f248c.1698329087.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm/dts/zynq-cse-qspi-x1-single.dts')
-rw-r--r--arch/arm/dts/zynq-cse-qspi-x1-single.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-cse-qspi-x1-single.dts b/arch/arm/dts/zynq-cse-qspi-x1-single.dts
new file mode 100644
index 0000000..c14fb42
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-x1-single.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE QSPI x1 Single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+/ {
+ model = "Zynq CSE QSPI X1 SINGLE Board";
+};
+
+&flash0 {
+ spi-rx-bus-width = <1>;
+};