diff options
author | Tom Rini <trini@konsulko.com> | 2023-11-07 10:36:23 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2023-11-07 10:36:23 -0500 |
commit | e17d174773e9ba9447596708e702b7382e47a6cf (patch) | |
tree | ef27022ead88cb3d66df0eeed8df06035d223b80 /arch/arm/dts/zynq-cse-qspi-x1-single.dts | |
parent | 37229edccca13ea47e44865aaafd17890f9148b2 (diff) | |
parent | 37f500d711ec1f6b25189c1f6022ffe5e70a38ab (diff) | |
download | u-boot-WIP/07Nov2023.zip u-boot-WIP/07Nov2023.tar.gz u-boot-WIP/07Nov2023.tar.bz2 |
Merge tag 'xilinx-for-v2024.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblazeWIP/07Nov2023
Xilinx changes for v2024.01-rc3
xilinx:
- Disable lock in mini spi configurations
zynq:
- DTS syncups
- Kconfig updates
zynqmp:
- DTS syncups
- Kconfig fixups
versal:
- Make 30MHz as default freq for spi
versal net:
- Enable ADMA for mmc
serial:
- Read baudrate from DT
spi:
- Put spi lock under one Kconfig
- Support 64bit addresses in cadance_ospi
- zynqmp_gqspi - change logging support
firmware:
- Handle errors in zynqmp_pm_feature()
include:
- Sync vsc8531 dt binding with kernel
Diffstat (limited to 'arch/arm/dts/zynq-cse-qspi-x1-single.dts')
-rw-r--r-- | arch/arm/dts/zynq-cse-qspi-x1-single.dts | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-cse-qspi-x1-single.dts b/arch/arm/dts/zynq-cse-qspi-x1-single.dts new file mode 100644 index 0000000..c14fb42 --- /dev/null +++ b/arch/arm/dts/zynq-cse-qspi-x1-single.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CSE QSPI x1 Single DTS + * + * Copyright (C) 2015 - 2017 Xilinx, Inc. + */ + +#include "zynq-cse-qspi.dtsi" + +/ { + model = "Zynq CSE QSPI X1 SINGLE Board"; +}; + +&flash0 { + spi-rx-bus-width = <1>; +}; |