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| author | Eugeniu Rosca <erosca@de.adit-jv.com> | 2019-07-09 18:27:13 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-07-23 13:38:23 +0200 |
| commit | 89c00f009ca8107d80834513877bc4ddd0ab2f5b (patch) | |
| tree | c3d488619ce9e61badcbae573b1d69b7ba2f36c4 /arch/arm/dts/r8a7795.dtsi | |
| parent | 70f3b164a6e18f6702db06754129efe8284bc9fc (diff) | |
| download | u-boot-89c00f009ca8107d80834513877bc4ddd0ab2f5b.zip u-boot-89c00f009ca8107d80834513877bc4ddd0ab2f5b.tar.gz u-boot-89c00f009ca8107d80834513877bc4ddd0ab2f5b.tar.bz2 | |
ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.2
Backport and squash below Linux 5.2 commits for R-Car Gen3:
Commit id * Summary line
6fffb98645e67b5 arm64: dts: renesas: r8a77990: ebisu: Add GPIO expander
b068ed6efe6244d arm64: dts: renesas: r8a77990: Fix SPDX license identifier style
96c25882252704d ! arm64: dts: renesas: r8a7796: remove unneeded sound #address/size-cells
71ac75dffdae2f8 arm64: dts: renesas: r8a77990: ebisu: Enable LVDS1 encoder
9a0ff5c727b60a3 arm64: dts: renesas: r8a77995: draak: Enable LVDS1 encoder
9130c15829846fa arm64: dts: renesas: ebisu: Fix adv7482 hexadecimal register address
191f7dcd1f5ea1f arm64: dts: renesas: r8a77965: add SSIU support for sound
a8f6110e64422d5 arm64: dts: renesas: ebisu: Enable VIN5
4162aa9db3d4469 arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1
af965ba3248edde arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40
1f4c123a98098cc arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC
474706117c2baa6 arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config
e2fa79de7ecbef4 arm64: dts: renesas: Update Ebisu and Draak bootargs
de8e8daaf7190ef arm64: dts: renesas: salvator-common: Sort node label
05f1d882d28b871 arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii
7a516e49d975311 arm64: dts: renesas: use extended audio dmac register
e3414b8c45afa5c arm64: dts: renesas: salvator-common: Add GPIO keys support
720066d17c973fd arm64: dts: renesas: r8a7795: Add CMT device nodes
99cb95103e2d058 arm64: dts: renesas: r8a77965: Add CMT device nodes
28a5c61b5136d58 arm64: dts: renesas: r8a77990: Add CMT device nodes
32d622f3290b2a1 arm64: dts: renesas: r8a77965: Remove reg-names of display node
(*) Patch id mismatch between Linux and U-Boot commit.
[!] Dropped changes in arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts,
since the file doesn't exist in the U-Boot tree.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Diffstat (limited to 'arch/arm/dts/r8a7795.dtsi')
| -rw-r--r-- | arch/arm/dts/r8a7795.dtsi | 72 |
1 files changed, 71 insertions, 1 deletions
diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi index abeac30..097538c 100644 --- a/arch/arm/dts/r8a7795.dtsi +++ b/arch/arm/dts/r8a7795.dtsi @@ -462,6 +462,76 @@ reg = <0 0xe6060000 0 0x50c>; }; + cmt0: timer@e60f0000 { + compatible = "renesas,r8a7795-cmt0", + "renesas,rcar-gen3-cmt0"; + reg = <0 0xe60f0000 0 0x1004>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 303>; + clock-names = "fck"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 303>; + status = "disabled"; + }; + + cmt1: timer@e6130000 { + compatible = "renesas,r8a7795-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6130000 0 0x1004>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 302>; + clock-names = "fck"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 302>; + status = "disabled"; + }; + + cmt2: timer@e6140000 { + compatible = "renesas,r8a7795-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6140000 0 0x1004>; + interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 301>; + clock-names = "fck"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 301>; + status = "disabled"; + }; + + cmt3: timer@e6148000 { + compatible = "renesas,r8a7795-cmt1", + "renesas,rcar-gen3-cmt1"; + reg = <0 0xe6148000 0 0x1004>; + interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 300>; + clock-names = "fck"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 300>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a7795-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; @@ -1836,7 +1906,7 @@ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ + <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; clocks = <&cpg CPG_MOD 1005>, |