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| author | Robert Marko <robert.marko@sartura.hr> | 2020-10-08 22:05:10 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-10-22 09:54:54 -0400 |
| commit | 96d603667106026c2f8fbb96e4581bbbb02566dc (patch) | |
| tree | 9ede47d00aba46ea10ecb12f21c08422ed074ceb /arch/arm/dts/qcom-ipq4019.dtsi | |
| parent | 367ea426a51886f6815e520f8b75a010cfa1bdfb (diff) | |
| download | u-boot-96d603667106026c2f8fbb96e4581bbbb02566dc.zip u-boot-96d603667106026c2f8fbb96e4581bbbb02566dc.tar.gz u-boot-96d603667106026c2f8fbb96e4581bbbb02566dc.tar.bz2 | |
IPQ40xx: Add SPI support
Since we have SPI driver for IPQ40xx QUP SPI controller, lets add the necessary nodes, pinctrl and clocks.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'arch/arm/dts/qcom-ipq4019.dtsi')
| -rw-r--r-- | arch/arm/dts/qcom-ipq4019.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi index e0e4188..936ef74 100644 --- a/arch/arm/dts/qcom-ipq4019.dtsi +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -22,6 +22,7 @@ aliases { serial0 = &blsp1_uart1; + spi0 = &blsp1_spi1; }; reserved-memory { @@ -89,6 +90,17 @@ gpio-count = <100>; gpio-bank-name="soc"; #gpio-cells = <2>; + u-boot,dm-pre-reloc; + }; + + blsp1_spi1: spi@78b5000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0x78b5000 0x600>; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + u-boot,dm-pre-reloc; }; usb3_ss_phy: ssphy@9a000 { |