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| author | Tom Rini <trini@konsulko.com> | 2021-04-09 07:41:32 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-04-09 07:41:32 -0400 |
| commit | c3932e5eaf8d92e701c44b1a0a86488d14e5529b (patch) | |
| tree | 514c5dcf9b86f77e9d5447b13ca65ca682eb554d /arch/arm/dts/imx6q-gw52xx.dts | |
| parent | f6127db8cc8dec22cf9cd6d6363d812f659ce517 (diff) | |
| parent | 2fc93e5bafdae7cf6373479e054e9f3943fde23c (diff) | |
| download | u-boot-WIP/09Apr2021.zip u-boot-WIP/09Apr2021.tar.gz u-boot-WIP/09Apr2021.tar.bz2 | |
Merge tag 'u-boot-imx-20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxWIP/09Apr2021
u-boot-imx-20210409
-------------------
- Secure Boot :
- HAB for MX8M / MX7ULP
- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
- mx23 olinuxo
- usbarmory
- marsboard / riotboard
- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
Diffstat (limited to 'arch/arm/dts/imx6q-gw52xx.dts')
| -rw-r--r-- | arch/arm/dts/imx6q-gw52xx.dts | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q-gw52xx.dts b/arch/arm/dts/imx6q-gw52xx.dts new file mode 100644 index 0000000..6e1c493 --- /dev/null +++ b/arch/arm/dts/imx6q-gw52xx.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2013 Gateworks Corporation + */ + +/dts-v1/; +#include "imx6q.dtsi" +#include "imx6qdl-gw52xx.dtsi" + +/ { + model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX"; + compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q"; +}; + +&i2c3 { + adv7180: camera@20 { + compatible = "adi,adv7180"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adv7180>; + reg = <0x20>; + powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio3>; + interrupts = <30 IRQ_TYPE_LEVEL_LOW>; + + port { + adv7180_to_ipu2_csi1_mux: endpoint { + remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>; + bus-width = <8>; + }; + }; + }; +}; + +&ipu2_csi1_from_ipu2_csi1_mux { + bus-width = <8>; +}; + +&ipu2_csi1_mux_from_parallel_sensor { + remote-endpoint = <&adv7180_to_ipu2_csi1_mux>; + bus-width = <8>; +}; + +&ipu2_csi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu2_csi1>; +}; + +&iomuxc { + pinctrl_adv7180: adv7180grp { + fsl,pins = < + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0 + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0 + >; + }; + + pinctrl_ipu2_csi1: ipu2_csi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0 + MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0 + MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0 + MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0 + MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0 + MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0 + MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0 + MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0 + MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0 + MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0 + MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0 + >; + }; +}; + +&sata { + status = "okay"; +}; |